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SN74ACT573NE4 PDF预览

SN74ACT573NE4

更新时间： 2024-11-11 05:17:59
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
16页 520K
描述
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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SN74ACT573NE4 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：DIP
包装说明：DIP-20针数：20
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：1 week风险等级：1.22
Is Samacsys：N其他特性：BROADSIDE VERSION OF 373
控制类型：ENABLE LOW计数方向：UNIDIRECTIONAL
系列：ACTJESD-30 代码：R-PDIP-T20
JESD-609代码：e4长度：25.4 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.024 A位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：DIP封装等效代码：DIP20,.3
封装形状：RECTANGULAR封装形式：IN-LINE
包装方法：TUBE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：12 ns传播延迟（tpd）：12 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：THROUGH-HOLE端子节距：2.54 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.62 mmBase Number Matches：1

SN74ACT573NE4 数据手册

 浏览型号SN74ACT573NE4的Datasheet PDF文件第2页浏览型号SN74ACT573NE4的Datasheet PDF文件第3页浏览型号SN74ACT573NE4的Datasheet PDF文件第4页浏览型号SN74ACT573NE4的Datasheet PDF文件第5页浏览型号SN74ACT573NE4的Datasheet PDF文件第6页浏览型号SN74ACT573NE4的Datasheet PDF文件第7页 
SN54ACT573, SN74ACT573  
OCTAL D-TYPE TRANSPARENT LATCHES  
WITH 3-STATE OUTPUTS  
SCAS538D – OCTOBER 1995 – REVISED OCTOBER 2002  
SN54ACT573 . . . J OR W PACKAGE  
SN74ACT573 . . . DB, DW, N, NS, OR PW PACKAGE  
(TOP VIEW)  
4.5-V to 5.5-V V  
Operation  
CC  
Inputs Accept Voltages to 5.5 V  
Max t of 9.5 ns at 5 V  
pd  
Inputs Are TTL-Voltage Compatible  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
LE  
description/ordering information  
These 8-bit latches feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. The devices  
are particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
GND  
The eight latches are D-type transparent latches.  
When the latch-enable (LE) input is high, the Q  
outputs follow the data (D) inputs. When LE is  
taken low, the Q outputs are latched at the logic  
levels set up at the D inputs.  
SN54ACT573 . . . FK PACKAGE  
(TOP VIEW)  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines in a bus-organized system without need for  
interface or pullup components.  
3
2
1
20 19  
18  
4
5
6
7
8
3D  
4D  
5D  
6D  
7D  
2Q  
3Q  
4Q  
5Q  
6Q  
17  
16  
15  
14  
9 10 11 12 13  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
PDIP – N  
Tube  
SN74ACT573N  
SN74ACT573N  
Tube  
SN74ACT573DW  
SN74ACT573DWR  
SN74ACT573NSR  
SN74ACT573DBR  
SN74ACT573PWR  
SNJ54ACT573J  
SOIC – DW  
ACT573  
Tape and reel  
Tape and reel  
Tape and reel  
Tape and reel  
Tube  
–40°C to 85°C  
SOP – NS  
SSOP – DB  
TSSOP – PW  
CDIP – J  
ACT573  
AD573  
AD573  
SNJ54ACT573J  
SNJ54ACT573W  
SNJ54ACT573FK  
–55°C to 125°C  
CFP – W  
Tube  
SNJ54ACT573W  
SNJ54ACT573FK  
LCCC – FK  
Tube  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...16

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SN74ACT573NE4 替代型号

型号 品牌 替代类型 描述 数据表
CD74ACT573EE4 TI

类似代替

 Octor Transparent Latch, 3-state
5962-8766401RA TI

类似代替

 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573N TI

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 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

与SN74ACT573NE4相关器件

型号 品牌 获取价格 描述 数据表
SN74ACT573NSR TI

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 		OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573NSRE4 TI

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 		OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573NSRG4 TI

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 		ACT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, SOP-20
SN74ACT573PW TI

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 		OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573PWE4 TI

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 		OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573PWG4 TI

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 		Octal D-Type Transparent Latches With 3-State Outputs 20-TSSOP -40 to 85
SN74ACT573PWLE TI

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 		OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573PWR TI

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 		OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573PWRE4 TI

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 		OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74ACT573PWRG4 TI

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 		ACT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, TSSOP-20

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