SN74ACT2440
NuBus INTERFACE CONTROLLER
SCHS010 – D3158, OCTOBER 1988 – REVISED JANUARY 1991
FN PACKAGE
(TOP VIEW)
• Designed for NuBus Interface
Applications
• Supports Master, Slave, and Master/Slave
Applications
9
8 7 6 5 4 3 2 1
68
6766 65 64 63 6261
60
• Conforms to ANSI/IEEE Std 1196-1987
RESET
ARB0
GND
ARB1
GND
ARB2
GND
ARB3
GND
10
A1
A0
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
59
58
57
• Designed to Operate With SN74BCT2420
V
CC
SIACK
NuBus Data/Address Interface Devices
• Supports NuBus 1987 Block Transfers
56 SGNTA
55 LOCTM1
54 LOCTM0
53 NMREQ
52 GND
With the Addition of the SN74ALS2442
• EPIC (Enhanced Performance Implanted
CMOS) 1-µm Process
V
51 MHOLD
CC
• Fully TTL-Compatible
START
ACK
LACK
MLREQ
MRDY
50
49
48
47
46
45
44
• Dependable Texas Instruments Quality and
GND
RQST
GND
NMRQ
CLK
Reliability
NREQ
MDONE
NLOCK
NMSTR
description
27 28 2930 3132 33 343536 37 38 39 40 4142 43
The SN74ACT2440 NuBus Controller handles
NuBus signaling protocol in compliance with
ANSI/IEEE Std 1196-1987. The device allows a
simple connection to the NuBus ; typical
configurations include master-only, slave-only,
and master/slave. Additionally, it provides extra status and control lines to facilitate more sophisticated
approaches. With the addition of the SN74ALS2442, slave block transfers can be supported by this device. For
additional details on block transfers, consult the SN74ALS2442 data sheet and the application note titled
Supporting NuBus Block Slave Transfers Using Texas Instruments SN74ACT2440, SN74BCT2420, and
SN74ALS2442.
Figure 1 shows a typical NuBus interface using the ’ACT2440. Data and address buffering is handled via two
SN74BCT2420s. The SN74BCT2420s are BiCMOS buffers designed specifically for supporting NuBus
interfacing. The ’ACT2440 provides the buffer control signals needed to directly drive the SN74BCT2420s;
however, in simpler applications, standard SSI and MSI buffers may be used in place of the ’BCT2420s.
The ’ACT2440 is comprised of five major signal groups: byte decode signals, data/address interface-control
signals, master/slave input signals, NuBus card-slot signals, and NuBus status signals. Byte decode
determines which type of NuBus cycle is being performed. Data/address interface control provides the
buffering signals required to multiplex and de-multiplex the NuBus data/address lines. The master/slave
inputs control the master- and slave-state machines. The NuBus card-slot signals interface with the NuBus .
The NuBus status signals indicate the status of the master/slave-state machines and provide buffered
NuBus signals. Refer to Table 1 for additional details.
The SN74ACT2440 is characterized for operation from 0°C to 70°C.
NuBus is a trademark of Texas Instruments Incorporated.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1991, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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