ꢀ
ꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢇꢈ ꢉ
ꢃ × ꢌ ×
ꢊ
ꢋ
ꢇ
ꢚ
ꢇ
ꢍ
ꢄ
ꢀ
ꢍ
ꢁ
ꢅ
ꢎ
ꢏ
ꢐ
ꢁ
ꢐꢑ
ꢀ
ꢒ
ꢓ
ꢔꢓ
ꢏꢕ
ꢅꢆ
ꢓꢐ
ꢁ
ꢄ
ꢖ
ꢗ
ꢓꢏ
ꢀ
ꢆ
ꢘ
ꢓ
ꢁꢙ
ꢗ
ꢓ
ꢏ
ꢀ
ꢆ
ꢘ
ꢐ
ꢑ
ꢆ
ꢕ
ꢚ
ꢐ
ꢏ
SCAS149A − APRIL 1990 − REVISED SEPTEMBER 1995
D Independent Asynchronous Inputs and
D Access Times of 25 ns With a 50-pF Load
D Data Rates From 0 to 50 MHz
Outputs
D Low-Power Advanced CMOS Technology
D Fall-Through Times of 23 ns Max
D High Output Drive for Direct Bus Interface
D 3-State Outputs
D Bidirectional
D 1024 Words by 9 Bits Each
D Programmable Almost-Full/Almost-Empty
D Available in 44-Pin PLCC (FN) Package
Flag
D Empty, Full, and Half-Full Flags
FN PACKAGE
(TOP VIEW)
6
5
4
3
2 1 44 43 42 41 40
B2
B3
B4
V
B5
B6
B7
B8
GND
AF/AEB
HFB
A3
A4
7
39
38
37
36
35
34
33
32
31
30
29
8
V
9
CC
A5
10
11
12
13
14
15
16
17
CC
A6
A7
A8
GND
AF/AEA
HFA
LDCKA
18 19 20 21 22 23 24 25 26 27 28
description
A FIFO memory is a storage device that allows data to be written into and read from its array at independent
data rates. The SN74ACT2236 is arranged as two 1024 by 9-bit FIFOs for high speed and fast access times.
It processes data at rates from 0 to 50 MHz with access times of 25 ns in a bit-parallel format.
The SN74ACT2236 consists of bus-transceiver circuits, two 1024 × 9 FIFOs, and control circuitry arranged for
multiplexed transmission of data directly from the data bus or from the internal FIFO memories. Enable OE and
DIR inputs are provided to control the transceiver functions. The select-control (SAB and SBA) inputs are
provided to select whether real-time or stored data is transferred. The circuitry used for select control eliminates
the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data.
Figure 1 shows the five fundamental bus-management functions that can be performed with the SN74ACT2236.
The SN74ACT2236 is characterized for operation from 0°C to 70°C.
For more information on this device family, see the application report 1K ꢀ 9 ꢀ 2 Asynchronous FIFOs
SN74ACT2235 and SN74ACT2236 in the 1996 High-Performance FIFO Memories Designer’s Handbook,
literature number SCAA012A.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ꢛ
ꢛ
ꢏ
ꢐ
ꢫ
ꢔ
ꢦ
ꢑ
ꢅ
ꢤ
ꢆ
ꢥ
ꢓ
ꢟ
ꢐ
ꢝ
ꢁ
ꢞ
ꢔ
ꢄ
ꢆ
ꢄ
ꢜ
ꢝ
ꢧ
ꢞ
ꢟ
ꢥ
ꢠ
ꢡ
ꢢ
ꢢ
ꢣ
ꢣ
ꢜ
ꢜ
ꢟ
ꢟ
ꢝ
ꢝ
ꢜ
ꢤ
ꢤ
ꢨ
ꢥ
ꢦ
ꢠ
ꢠ
ꢧ
ꢧ
ꢝ
ꢣ
ꢢ
ꢡ
ꢤ
ꢤ
ꢟ
ꢞ
ꢨ
ꢆꢧ
ꢦ
ꢩ
ꢤ
ꢪ
ꢜ
ꢥ
ꢢ
ꢤ
ꢣ
ꢜ
ꢣ
ꢟ
ꢠ
ꢝ
ꢦ
ꢫ
ꢢ
ꢝ
ꢣ
ꢣ
ꢧ
ꢤ
ꢬ
Copyright 1995, Texas Instruments Incorporated
ꢠ
ꢟ
ꢥ
ꢣ
ꢟ
ꢠ
ꢡ
ꢣ
ꢟ
ꢤ
ꢨ
ꢜ
ꢞ
ꢜ
ꢥ
ꢧ
ꢠ
ꢣ
ꢭ
ꢣ
ꢧ
ꢠ
ꢟ
ꢞ
ꢮ
ꢢ
ꢓ
ꢝ
ꢡ
ꢧ
ꢤ
ꢣ
ꢢ
ꢝ
ꢫ
ꢢ
ꢠ
ꢫ
ꢯ
ꢢ
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ
ꢠ
ꢠ
ꢢ
ꢝ
ꢣ
ꢰ
ꢬ
ꢛ
ꢠ
ꢟ
ꢫ
ꢦ
ꢥ
ꢣ
ꢜ
ꢟ
ꢝ
ꢨ
ꢠ
ꢟ
ꢥ
ꢧ
ꢤ
ꢤ
ꢜ
ꢝ
ꢱ
ꢫ
ꢟ
ꢧ
ꢤ
ꢝ
ꢟ
ꢣ
ꢝ
ꢧ
ꢥ
ꢧ
ꢤ
ꢤ
ꢢ
ꢠ
ꢜ
ꢪ
ꢰ
ꢜ
ꢝ
ꢥ
ꢪ
ꢦ
ꢫ
ꢧ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443