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SN74ACT10QDRQ1 PDF预览

SN74ACT10QDRQ1

更新时间: 2024-11-05 12:15:03
品牌 Logo 应用领域
德州仪器 - TI 栅极触发器逻辑集成电路光电二极管输入元件
页数 文件大小 规格书
9页 183K
描述
TRIPLE 3-INPUT POSITIVE-NAND GATE

SN74ACT10QDRQ1 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.26系列:ACT
JESD-30 代码:R-PDSO-G14长度:8.65 mm
负载电容(CL):50 pF逻辑集成电路类型:NAND GATE
最大I(ol):0.024 A功能数量:3
输入次数:3端子数量:14
最高工作温度:125 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
电源:5 VProp。Delay @ Nom-Sup:10 ns
传播延迟(tpd):10 ns认证状态:Not Qualified
施密特触发器:NO筛选级别:AEC-Q100
座面最大高度:1.75 mm子类别:Gates
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:AUTOMOTIVE
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:3.9 mm
Base Number Matches:1

SN74ACT10QDRQ1 数据手册

 浏览型号SN74ACT10QDRQ1的Datasheet PDF文件第2页浏览型号SN74ACT10QDRQ1的Datasheet PDF文件第3页浏览型号SN74ACT10QDRQ1的Datasheet PDF文件第4页浏览型号SN74ACT10QDRQ1的Datasheet PDF文件第5页浏览型号SN74ACT10QDRQ1的Datasheet PDF文件第6页浏览型号SN74ACT10QDRQ1的Datasheet PDF文件第7页 
SN74ACT10-Q1  
TRIPLE 3-INPUT POSITIVE-NAND GATE  
SCAS784A – OCTOBER 2004 − REVISED JANUARY 2008  
D OR PW PACKAGE  
(TOP VIEW)  
D
D
D
D
D
Qualified for Automotive Applications  
4.5-V to 5.5-V V Operation  
CC  
Inputs Accept Voltages to 5.5 V  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1B  
2A  
2B  
2C  
VCC  
1C  
1Y  
3A  
3B  
3C  
3Y  
Max t of 9.5 ns at 5 V  
pd  
Inputs Are TTL-Voltage Compatible  
description/ordering information  
2Y  
GND  
The SN74ACT10 device contains three independent  
3-input NAND gates. The device performs the  
Boolean functions Y = A B C or Y = A + B + C in  
positive logic.  
8
ORDERING INFORMATION†  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
§
SOIC − D  
TSSOP − PW  
Tape and reel  
Tape and reel  
SN74ACT10QDRQ1  
SN74ACT10QPWRQ1  
ACT10Q  
ACT10Q  
−40°C to 125°C  
For the most current package and ordering information, see the Package Option Addendum at the end of this  
document, or see the TI web site at www.ti.com.  
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
Product Preview  
§
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
H
L
B
H
X
L
C
H
X
X
L
L
H
H
H
X
X
X
logic diagram, each gate (positive logic)  
1
2
13  
1A  
12  
6
1Y  
1B  
1C  
3
2A  
4
2B  
5
2Y  
3Y  
2C  
11  
3A  
8
10  
9
3B  
3C  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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