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SN74ACT1073NSRE4 PDF预览

SN74ACT1073NSRE4

更新时间： 2024-11-05 05:17:59
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
9页 229K
描述
16-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION

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SN74ACT1073NSRE4 数据手册

 浏览型号SN74ACT1073NSRE4的Datasheet PDF文件第2页浏览型号SN74ACT1073NSRE4的Datasheet PDF文件第3页浏览型号SN74ACT1073NSRE4的Datasheet PDF文件第4页浏览型号SN74ACT1073NSRE4的Datasheet PDF文件第5页浏览型号SN74ACT1073NSRE4的Datasheet PDF文件第6页浏览型号SN74ACT1073NSRE4的Datasheet PDF文件第7页 
SN74ACT1073  
16-BIT BUS-TERMINATION ARRAY  
WITH BUS-HOLD FUNCTION  
SCAS193A – MARCH 1992 – REVISED NOVEMBER 2002  
DW OR NS PACKAGE  
(TOP VIEW)  
Designed to Ensure Defined Voltage Levels  
on Floating Bus Lines in CMOS Systems  
4.5-V to 5.5-V V  
Operation  
CC  
D1  
D2  
D3  
D16  
D15  
D14  
D13  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
Inputs Accept Voltages to 5.5 V  
Reduces Undershoot and Overshoot  
Caused By Line Reflections  
D4  
Repetitive Peak Forward  
GND  
GND  
D5  
D6  
D7  
V
CC  
Current . . . I  
= 100 mA  
V
FRM  
CC  
D12  
D11  
D10  
D9  
Inputs Are TTL-Voltage Compatible  
Low Power Consumption (Like CMOS)  
Center-Pin V  
and GND Configuration  
CC  
D8  
Minimizes High-Speed Switching Noise  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
description/ordering information  
This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp  
the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device  
also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path  
between its output and its input. The SN74ACT1073 prevents bus lines from floating without using pullup or  
pulldown resistors.  
The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The  
feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state  
generated by an active driver before the bus switches to the high-impedance state.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
Tube  
SN74ACT1073DW  
SN74ACT1073DWR  
SN74ACT1073NSR  
SOIC – DW  
SOP – NS  
ACT1073  
ACT1073  
–40°C to 85°C  
Tape and reel  
Tape and reel  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

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SN74ACT1073NSRE4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ACT1073NSR TI

完全替代

 16-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION
SN74ACT1073DWRE4 TI

完全替代

 16-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION
SN74S1053PW TI

功能相似

 16 位肖特基势垒二极管总线终端阵列 | PW | 20 | 0 to 70

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