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SN74ACT04IDREP PDF预览

SN74ACT04IDREP

更新时间: 2024-11-04 12:15:03
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
9页 302K
描述
HEX INVERTER

SN74ACT04IDREP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.91系列:ACT
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm负载电容(CL):50 pF
逻辑集成电路类型:INVERTER最大I(ol):0.024 A
湿度敏感等级:1功能数量:6
输入次数:1端子数量:14
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP14,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TR
峰值回流温度(摄氏度):260电源:5 V
最大电源电流(ICC):0.02 mAProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):9 ns认证状态:Not Qualified
施密特触发器:NO座面最大高度:1.75 mm
子类别:Gates最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.91 mmBase Number Matches:1

SN74ACT04IDREP 数据手册

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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇ ꢃꢈ ꢉꢊ  
ꢋꢉꢌ ꢍꢁ ꢎꢉ ꢏ ꢆꢉ ꢏ  
SCAS781 − OCTOBER 2004  
D
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
D
D
D
Inputs Accept Voltages to 5.5 V  
Max t of 8.5 ns at 5 V  
pd  
Inputs Are TTL-Voltage Compatible  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
D PACKAGE  
(TOP VIEW)  
D
D
D
Enhanced Product-Change Notification  
Qualification Pedigree  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1A  
1Y  
2A  
2Y  
3A  
V
CC  
4.5-V to 5.5-V V  
Operation  
CC  
6A  
6Y  
5A  
5Y  
4A  
4Y  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
3Y  
GND  
8
description/ordering information  
The SN74ACT04 contains six independent inverters. The device performs the Boolean function Y = A.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
PACKAGE  
T
A
−40°C to 85°C  
SOIC − D  
Tape and reel SN74ACT04IDREP  
SACT04IEP  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
FUNCTION TABLE  
(each inverter)  
INPUT  
A
OUTPUT  
Y
H
L
L
H
logic diagram, each inverter (positive logic)  
A
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢆꢞ  
Copyright 2004, Texas Instruments Incorporated  
ꢚ ꢞ ꢛ ꢚꢓ ꢔꢨ ꢖꢕ ꢙ ꢡꢡ ꢟꢙ ꢗ ꢙ ꢘ ꢞ ꢚ ꢞ ꢗ ꢛ ꢣ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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