SN54ACT00, SN74ACT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS523B – AUGUST 1995 – REVISED AUGUST 1999
SN54ACT00 . . . J OR W PACKAGE
SN74ACT00 . . . D, DB, N, OR PW PACKAGE
(TOP VIEW)
Inputs Are TTL-Voltage Compatible
EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
Package Options Include Plastic
1A
1B
1Y
2A
2B
V
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), DIP
(N) Packages, Ceramic Chip Carriers (FK),
Flat (W), and DIP (J) Packages
4B
4A
4Y
3B
3A
3Y
2Y
GND
description
8
The ‘ACT00 devices contain four independent 2-input
NAND gates. Each gate performs the Boolean
function of Y = A B or Y = A + B in positive logic.
SN54ACT00 . . . FK PACKAGE
(TOP VIEW)
The SN54ACT00 is characterized for operation over
the full military temperature range of –55°C to 125°C.
The SN74ACT00 is characterized for operation from
–40°C to 85°C.
3
2
1
20 19
18
1Y
NC
2A
4A
NC
4Y
NC
3B
4
5
6
7
8
17
16
15
14
FUNCTION TABLE
(each gate)
NC
2B
INPUTS
OUTPUT
Y
9 10 11 12 13
A
B
H
X
L
H
L
L
H
H
X
NC – No internal connection
†
logic symbol
logic diagram, each gate (positive logic)
1
1A
2
A
Y
B
&
3
6
1Y
2Y
3Y
4Y
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
8
11
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, N, PW, and W packages.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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