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SN74AC373DW PDF预览

SN74AC373DW

更新时间： 2024-11-16 23:03:07
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器锁存器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 102K
描述
OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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SN74AC373DW 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：SOP, SOP20,.4针数：20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：0.77控制类型：ENABLE LOW
计数方向：UNIDIRECTIONAL系列：AC
JESD-30 代码：R-PDSO-G20JESD-609代码：e4
长度：12.8 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.024 A
湿度敏感等级：1位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP20,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
包装方法：TUBE峰值回流温度（摄氏度）：260
电源：3.3/5 V最大电源电流（ICC）：0.04 mA
Prop。Delay @ Nom-Sup：15 ns传播延迟（tpd）：15 ns
认证状态：Not Qualified座面最大高度：2.65 mm
子类别：FF/Latches最大供电电压 (Vsup)：6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmBase Number Matches：1

SN74AC373DW 数据手册

 浏览型号SN74AC373DW的Datasheet PDF文件第2页浏览型号SN74AC373DW的Datasheet PDF文件第3页浏览型号SN74AC373DW的Datasheet PDF文件第4页浏览型号SN74AC373DW的Datasheet PDF文件第5页浏览型号SN74AC373DW的Datasheet PDF文件第6页 
SN54AC373, SN74AC373  
OCTAL D-TYPE TRANSPARENT LATCHES  
WITH 3-STATE OUTPUTS  
SCAS540B – OCTOBER 1995 – REVISED JUNE 1996  
SN54AC373 . . . J OR W PACKAGE  
SN74AC373 . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
3-State Noninverting Outputs Drive Bus  
Lines Directly  
Full Parallel Access for Loading  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
V
CC  
EPIC (Enhanced-Performance Implanted  
CMOS) 1-µm Process  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
LE  
Package Options Include Plastic  
Small-Outline (DW) Shrink Small-Outline  
(DB) and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK) and  
Flatpacks (W), and Standard Plastic (N) and  
Ceramic (J) DIPs  
description  
GND  
These 8-bit latches feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. The devices  
are particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
SN54AC373 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
6D  
4
5
6
7
8
The eight latches are D-type transparent latches.  
When the latch-enable (LE) input is high, the Q  
outputs follow the data (D) inputs. When LE is  
taken low, the Q outputs are latched at the logic  
levels set up at the D inputs.  
17  
16  
15  
14  
9 10 11 12 13  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or the high-  
impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The  
high-impedance state and increased drive provide the capability to drive bus lines in bus-organized systems  
without need for interface or pullup components.  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
The SN54AC373 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74AC373 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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SN74AC373DW 替代型号

型号 品牌 替代类型 描述 数据表
SN74AC373NSR TI

完全替代

 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74AC373DWR TI

类似代替

 OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
SN74AC374DWR TI

类似代替

 OCTAL D TYPE EDGE TRIGGERED FLIP FLOPS WITH 3 STATE OUTPUTS

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