ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢇꢈ ꢀꢁ ꢉꢃ ꢄꢅ ꢆꢇ
ꢊ ꢋꢌꢍ ꢎꢏ ꢐ ꢑꢌꢁ ꢍꢒꢊ ꢍꢓ ꢀꢌ ꢊ ꢌꢔꢏ ꢑꢁꢄꢁꢕ ꢖ ꢄꢊꢏ ꢀ
SCAS529D − AUGUST 1995 − REVISED OCTOBER 2003
D
D
2-V to 6-V V
Operation
D
Max t of 6.5 ns at 5 V
pd
CC
Inputs Accept Voltages to 6 V
SN54AC10 . . . J OR W PACKAGE
SN74AC10 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
SN54AC10 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1B
2A
2B
2C
V
CC
3
2
1
20 19
18
1C
1Y
3A
3B
3C
3Y
1Y
NC
3A
NC
3B
2A
NC
2B
4
5
6
7
8
17
16
15
14
NC
2C
2Y
GND
9 10 11 12 13
8
NC − No internal connection
description/ordering information
The ’AC10 devices contain three independent 3-input NAND gates. The devices perform the Boolean function
Y = A • B • C or Y = A + B + C in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube
SN74AC10N
SN74AC10N
Tube
SN74AC10D
AC10
Tape and reel
Tape and reel
Tape and reel
Tube
SN74AC10DR
SN74AC10NSR
SN74AC10DBR
SN74AC10PW
SN74AC10PWR
SNJ54AC10J
SNJ54AC10W
SNJ54AC10FK
SOP − NS
AC10
AC10
−40°C to 85°C
SSOP − DB
TSSOP − PW
AC10
Tape and reel
Tube
CDIP − J
CFP − W
LCCC − FK
SNJ54AC10J
SNJ54AC10W
SNJ54AC10FK
Tube
−55°C to 125°C
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
H
L
B
H
X
L
C
H
X
X
L
L
H
H
H
X
X
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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