ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢆꢇ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢆ
ꢉ ꢊꢄꢋꢌ ꢊꢍꢎ ꢏ ꢐ ꢑꢒꢁ ꢍꢊꢓ ꢍꢔ ꢀꢒ ꢓ ꢒꢕꢏ ꢑꢁꢄꢁ ꢋ ꢖ ꢄꢓꢏ ꢀ
SCAS524E − AUGUST 1995 − REVISED OCTOBER 2003
D
D
D
2-V to 6-V V
Operation
CC
Inputs Accept Voltages to 6 V
Max t of 7 ns at 5 V
pd
SN54AC00 . . . FK PACKAGE
(TOP VIEW)
SN54AC00 . . . J OR W PACKAGE
SN74AC00 . . . D, DB, N, NS, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
14
13
12
11
10
9
1A
1B
1Y
2A
2B
V
CC
3
2
1
20 19
18
4B
4A
4Y
3B
3A
3Y
1Y
NC
2A
4A
4
5
6
7
8
NC
17
16 4Y
15
14
NC
2B
NC
3B
2Y
GND
9 10 11 12 13
8
NC − No internal connection
description/ordering information
The ‘AC00 devices contain four independent 2-input NAND gates. Each gate performs the Boolean function
of Y = A S B or Y = A + B in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube
SN74AC00N
SN74AC00N
Tube
SN74AC00D
AC00
Tape and reel
Tape and reel
Tape and reel
Tube
SN74AC00DR
SN74AC00NSR
SN74AC00DBR
SN74AC00PW
SN74AC00PWR
SNJ54AC00J
SNJ54AC00W
SNJ54AC00FK
SOP − NS
AC00
AC00
−40°C to 85°C
SSOP − DB
TSSOP − PW
AC00
Tape and reel
Tube
CDIP − J
CFP − W
LCCC − FK
SNJ54AC00J
SNJ54AC00W
SNJ54AC00FK
Tube
−55°C to 125°C
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
H
X
L
H
L
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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