SN54ABTH25245, SN74ABTH25245
25-Ω OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS251F – JUNE 1992 – REVISED MAY 1997
SN54ABTH25245 . . . JT PACKAGE
SN74ABTH25245 . . . DW OR NT PACKAGE
(TOP VIEW)
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
A1
GND
A2
A3
GND
A4
A5
GND
A6
DIR
B1
B2
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
V
CC
B3
B4
B5
B6
Typical V
(Output Ground Bounce) < 1 V
OLP
at V
= 5 V, T = 25°C
CC
A
High-Impedance State During Power Up
and Power Down
V
CC
Designed to Facilitate Incident-Wave
Switching for Line Impedances of 25 Ω or
Greater
A7 10
15 B7
GND
A8
B8
OE
11
12
14
13
Distributed V
Minimizes High-Speed Switching Noise
and GND Pin Configuration
CC
SN54ABTH25245 . . . FK PACKAGE
(TOP VIEW)
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic
Small-Outline (DW) Package, Ceramic Chip
Carriers (FK), and Standard Plastic (NT)
and Ceramic (JT) DIPs
4
3
2 1 28 27 26
B3
5
25 OE
V
24 A8
23
6
CC
B2
7
GND
NC
A7
A6
GND
22
21
20
19
NC
B1
DIR
A1
8
description
9
The ’ABTH25245 are 25-Ω octal bus transceivers
designed for asynchronous communication
between data buses. They improve both the
performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
transceivers.
10
11
12 13 14 15 16 17 18
NC – No internal connection
These devices allow noninverted data
transmission from the A bus to the B bus or from
theBbustotheAbus, dependingonthelogiclevel
at the direction-control (DIR) input. The
output-enable (OE) input can disable the device
so that both buses are effectively isolated. When
OE is low, the device is active.
These transceivers are capable of sinking 188 mA of I current, which facilitates switching 25-Ω transmission
OL
linesontheincidentwave. ThedistributedV andGNDpinsminimizeswitchingnoiseformore-reliablesystem
CC
operation.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
Copyright 1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
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