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SN74ABT540PW PDF预览

SN74ABT540PW

更新时间： 2024-11-14 22:36:35
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路光电二极管输出元件信息通信管理
页数 文件大小 规格书
6页 118K
描述
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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中文翻译

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SN74ABT540PW 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete包装说明：TSSOP-20
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.84
Is Samacsys：N控制类型：ENABLE LOW
系列：ABTJESD-30 代码：R-PDSO-G20
JESD-609代码：e4负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.064 A
湿度敏感等级：1位数：8
功能数量：1端口数量：2
端子数量：20最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：INVERTED封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：TSSOP20,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：260电源：5 V
最大电源电流（ICC）：30 mAProp。Delay @ Nom-Sup：4.8 ns
传播延迟（tpd）：4.8 ns认证状态：Not Qualified
子类别：Bus Driver/Transceivers最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
Base Number Matches：1

SN74ABT540PW 数据手册

 浏览型号SN74ABT540PW的Datasheet PDF文件第2页浏览型号SN74ABT540PW的Datasheet PDF文件第3页浏览型号SN74ABT540PW的Datasheet PDF文件第4页浏览型号SN74ABT540PW的Datasheet PDF文件第5页浏览型号SN74ABT540PW的Datasheet PDF文件第6页 
SN54ABT540, SN74ABT540  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS188C – FEBRUARY 1991 – REVISED JANUARY 1997  
SN54ABT540 . . . J OR W PACKAGE  
SN74ABT540 . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
OE2  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
Y1  
Y2  
Y3  
Y4  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
Y5  
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
13 Y6  
12 Y7  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK),  
Plastic (N) and Ceramic (J) DIPs, and  
Ceramic Flat (W) Package  
11  
GND  
Y8  
SN54ABT540 . . . FK PACKAGE  
(TOP VIEW)  
description  
The ’ABT540 octal buffers and line drivers are  
ideal for driving bus lines or buffer memory  
address registers. The devices feature inputs and  
outputs on opposite sides of the package that  
facilitate printed circuit board layout.  
3
2
1
20 19  
18  
Y1  
Y2  
Y3  
Y4  
Y5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
9 10 11 12 13  
The 3-state control gate is a 2-input AND gate with  
active-low inputs so that if either output-enable  
(OE1 or OE2) input is high, all corresponding  
outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54ABT540 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ABT540 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
A
L
H
L
L
L
H
X
X
H
X
Z
Z
X
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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