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SN74ABT373NSRG4 PDF预览

SN74ABT373NSRG4

更新时间： 2024-09-24 01:16:11
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理光电二极管输出元件逻辑集成电路
页数 文件大小 规格书
21页 909K
描述
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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SN74ABT373NSRG4 技术参数

是否Rohs认证： 符合生命周期：Obsolete
零件包装代码：SOIC包装说明：SOP, SOP20,.3
针数：20Reach Compliance Code：compliant
HTS代码：8542.39.00.01风险等级：5.28
系列：ABTJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.6 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大I（ol）：0.064 A湿度敏感等级：1
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：85 °C最低工作温度：-40 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.3封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：5 V
Prop。Delay @ Nom-Sup：6.2 ns传播延迟（tpd）：7.2 ns
认证状态：Not Qualified座面最大高度：2 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：5.3 mmBase Number Matches：1

SN74ABT373NSRG4 数据手册

 浏览型号SN74ABT373NSRG4的Datasheet PDF文件第2页浏览型号SN74ABT373NSRG4的Datasheet PDF文件第3页浏览型号SN74ABT373NSRG4的Datasheet PDF文件第4页浏览型号SN74ABT373NSRG4的Datasheet PDF文件第5页浏览型号SN74ABT373NSRG4的Datasheet PDF文件第6页浏览型号SN74ABT373NSRG4的Datasheet PDF文件第7页 
SN54ABT373, SN74ABT373  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCBS155D – JANUARY 1991 – REVISED MAY 1997  
SN54ABT373 . . . J OR W PACKAGE  
SN74ABT373 . . . DB, DW, N, OR PW PACKAGE  
(TOP VIEW)  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
OE  
1Q  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
Typical V  
(Output Ground Bounce) < 1 V  
8Q  
8D  
7D  
OLP  
at V  
= 5 V, T = 25°C  
1D  
2D  
CC  
A
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
2Q  
3Q  
16 7Q  
15 6Q  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages, Ceramic Chip Carriers (FK),  
Ceramic Flat (W) Package, and Plastic (N)  
and Ceramic (J) DIPs  
14  
13  
12  
11  
3D  
4D  
4Q  
GND  
6D  
5D  
5Q  
LE  
description  
SN54ABT373 . . . FK PACKAGE  
(TOP VIEW)  
The eight latches of the ’ABT373 are transparent  
D-type latches. While the latch-enable (LE) input  
is high, the Q outputs follow the data (D) inputs.  
When LE is taken low, the Q outputs are latched  
at the logic levels set up at the D inputs.  
3
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
4
5
6
7
8
17  
16  
15  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or  
a
14 6D  
9 10 11 12 13  
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus  
lines significantly. The high-impedance state and  
increased drive provide the capability to drive bus  
lines without need for interface or pullup  
components.  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54ABT373 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74ABT373 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...21

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SN74ABT373NSRG4 替代型号

型号 品牌 替代类型 描述 数据表
SN74ABT373NSR TI

完全替代

 Octal Transparent D-Type Latches With 3-State Outputs 20-SO -40 to 85
SN74ABT374ANSR TI

类似代替

 Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-SO -40 to 85

与SN74ABT373NSRG4相关器件

型号 品牌 获取价格 描述 数据表
SN74ABT373PW TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74ABT373PW ROCHESTER

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 		Bus Driver, ABT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20, PLASTIC, TSSOP-20
SN74ABT373PWE4 TI

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 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN74ABT373PWG4 TI

获取价格

 		ABT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, TSSOP-20
SN74ABT373PWLE TI

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 		Octal Transparent D-Type Latches With 3-State Outputs 20-TSSOP -40 to 85
SN74ABT373PWR ROCHESTER

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 		Bus Driver, ABT Series, 1-Func, 8-Bit, True Output, BICMOS, PDSO20, TSSOP-20
SN74ABT373PWR TI

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 		具有三态输出的八路透明 D 型锁存器 | PW | 20 | -40 to 85
SN74ABT373PWRE4 TI

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 		ABT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, TSSOP-20
SN74ABT373PWRG4 TI

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 		ABT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDSO20, GREEN, PLASTIC, TSSOP-20
SN74ABT374A TI

获取价格

 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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