Datasheet > SN74ABT3613-15PQ

SN74ABT3613-15PQ

更新时间： 2024-09-23 17:18:35

品牌	Logo	应用领域
德州仪器 - TI		时钟先进先出芯片信息通信管理内存集成电路
页数	文件大小	规格书
35页	536K
描述
64 x 36 synchronous FIFO memory 132-BQFP 0 to 70

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SN74ABT3613-15PQ 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	BQFP, SPQFP132,1.1SQ	针数：	132
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.32.00.71	风险等级：	5.76
最长访问时间：	10 ns	其他特性：	PARITY GENERATOR/CHECKER; MAILBOX
最大时钟频率 (fCLK)：	66.7 MHz	周期时间：	15 ns
JESD-30 代码：	S-PQFP-G132	长度：	24.13 mm
内存密度：	2304 bit	内存集成电路类型：	BI-DIRECTIONAL FIFO
内存宽度：	36	功能数量：	1
端子数量：	132	字数：	64 words
字数代码：	64	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：
组织：	64X36	输出特性：	3-STATE
可输出：	YES	封装主体材料：	PLASTIC/EPOXY
封装代码：	BQFP	封装等效代码：	SPQFP132,1.1SQ
封装形状：	SQUARE	封装形式：	FLATPACK, BUMPER
并行/串行：	PARALLEL	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	4.57 mm	子类别：	FIFOs
最大压摆率：	0.13 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	BICMOS
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	24.13 mm
Base Number Matches：	1

SN74ABT3613-15PQ 数据手册

SN74ABT3613

64 × 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY

WITH BUS MATCHING AND BYTE SWAPPING

SCBS128F – JULY 1992 – REVISED APRIL 1998

Low-Power Advanced BiCMOS Technology

Programmable Almost-Full and

Almost-Empty Flags

Free-Running CLKA and CLKB Can Be

Asynchronous or Coincident

Microprocessor Interface Control Logic

FF and AF Flags Synchronized by CLKA

EF and AE Flags Synchronized by CLKB

Passive Parity Checking on Each Port

64 × 36 FIFO Buffering Data From Port A to

Port B

Mailbox-Bypass Registers in Each

Direction

Parity Generation Can Be Selected for Each

Port

Dynamic Port-B Bus Sizing of 36 Bits (Long

Word), 18 Bits (Word), and 9 Bits (Byte)

Supports Clock Frequencies up to 67 MHz

Fast Access Times of 10 ns

Selection of Big- or Little-Endian Format for

Word and Byte Bus Sizes

Package Options Include 120-Pin Thin

Quad Flat (PCB) and 132-Pin Quad Flat

(PQ) Packages

Three Modes of Byte-Order Swapping on

Port B

description

The SN74ABT3613 is a high-speed, low-power BiCMOS clocked FIFO memory. It supports clock frequencies

up to 67 MHz and has read-access times as fast as 10 ns. A 64 × 36 dual-port SRAM FIFO in this device buffers

data from port A to port B. The FIFO has flags to indicate empty and full conditions and two programmable flags

(almost full and almost empty) to indicate when a selected number of words is stored in memory. FIFO data on

port B can be output in 36-bit, 18-bit, and 9-bit formats, with a choice of big- or little-endian configurations. Three

modes of byte-order swapping are possible with any bus-size selection. Communication between each port can

bypass the FIFO via two 36-bit mailbox registers. Each mailbox register has a flag to signal when new mail has

been stored. Parity is checked passively on each port and can be ignored if not desired. Parity generation can

be selected for data read from each port.

The SN74ABT3613 is a clocked FIFO, which means each port employs a synchronous interface. All data

transfersthroughaportaregatedtothelow-to-hightransitionofacontinuous(free-running)portclockbyenable

signals. The continuous clocks for each port are independent of one another and can be asynchronous or

coincident. The enables for each port are arranged to provide a simple interface between microprocessors

and/or buses controlled by a synchronous interface.

The full flag (FF) and almost-full (AF) flag of a FIFO are two-stage synchronized to the port clock that writes data

to its array. The empty flag (EF) and almost-empty (AE) flag of a FIFO are two-stage synchronized to the port

clock that reads data from its array.

The SN74ABT3613 is characterized for operation from 0°C to 70°C.

For more information on this device family, see the following application reports:

FIFO Mailbox-Bypass Registers: Using Bypass Registers to Initialize DMA Control

(literature number SCAA007)

Advanced Bus-Matching/Byte-Swapping Features for Internetworking FIFO Applications

(literature number SCAA014)

Parity-Generate and Parity-Check Features for High-Bandwidth-Computing FIFO Applications

(literature number SCAA015)

Internetworking the SN74ABT3614 (literature number SCAA018)

Metastability Performance of Clocked FIFOs (literature number SCZA004)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...35

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与SN74ABT3613-15PQ相关器件

型号	品牌	获取价格	描述	数据表
SN74ABT3613-20PCB	ROCHESTER	获取价格	64X36 OTHER FIFO, 12ns, PQFP120, PLASTIC, HLQFP-120
SN74ABT3613-20PCB	TI	获取价格	CLOCKED FIRST-IN, FIRST-OUT MEMORY WITH BUS MATCHING AND BYTE SWAPPING
SN74ABT3613-20PCBR	TI	获取价格	64X36 OTHER FIFO, 12ns, PQFP120, PLASTIC, HLQFP-120
SN74ABT3613-20PQ	TI	获取价格	64 x 36 synchronous FIFO memory 132-BQFP 0 to 70
SN74ABT3613-20PQ	ROCHESTER	获取价格	64X36 OTHER FIFO, 12ns, PQFP132, PLASTIC, BQFP-132
SN74ABT3613-30PCB	TI	获取价格	64 x 36 synchronous FIFO memory 120-HLQFP 0 to 70
SN74ABT3613-30PCB	ROCHESTER	获取价格	64X36 OTHER FIFO, 15ns, PQFP120, PLASTIC, HLQFP-120
SN74ABT3613-30PCBR	TI	获取价格	64X36 OTHER FIFO, 15ns, PQFP120, PLASTIC, HLQFP-120
SN74ABT3613-30PQ	TI	获取价格	64 x 36 synchronous FIFO memory 132-BQFP 0 to 70
SN74ABT3613-30PQ	ROCHESTER	获取价格	64X36 OTHER FIFO, 15ns, PQFP132, PLASTIC, BQFP-132

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