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SN74ABT16827 PDF预览

SN74ABT16827

更新时间： 2024-11-13 23:06:11
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
6页 109K
描述
20-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN74ABT16827 数据手册

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SN54ABT16827, SN74ABT16827  
20-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS220C – JUNE 1992 – REVISED MAY 1997  
SN54ABT16827 . . . WD PACKAGE  
SN74ABT16827 . . . DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1OE2  
1A1  
1A2  
GND  
1A3  
1A4  
1
2
3
4
5
6
7
8
9
56  
55  
54  
53  
52  
51  
50  
49  
48  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
Typical V  
(Output Ground Bounce) < 1 V  
OLP  
at V  
= 5 V, T = 25°C  
CC  
A
High-Impedance State During Power Up  
and Power Down  
V
V
CC  
CC  
1Y5  
1Y6  
1A5  
1A6  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
1Y7 10  
GND  
1Y8  
47 1A7  
Flow-Through Architecture Optimizes PCB  
Layout  
GND  
1A8  
11  
12  
46  
45  
High-Drive Outputs (–32-mA I , 64-mA I  
)
OL  
1Y9 13  
1Y10 14  
2Y1 15  
2Y2 16  
44 1A9  
43 1A10  
42 2A1  
41 2A2  
OH  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) Package and  
380-mil Fine-Pitch Ceramic Flat (WD)  
Package Using 25-mil Center-to-Center  
Spacings  
2Y3  
17  
40  
2A3  
GND 18  
2Y4 19  
2Y5 20  
2Y6 21  
39 GND  
38 2A4  
37 2A5  
36 2A6  
description  
The ’ABT16827 are noninverting 20-bit buffers  
composed of two 10-bit sections with separate  
output-enable signals. For either 10-bit buffer  
section, the two output-enable (1OE1 and 1OE2  
or 2OE1 and 2OE2) inputs must both be low for  
the corresponding Y outputs to be active. If either  
output-enable input is high, the outputs of that  
10-bit buffer section are in the high-impedance  
state.  
V
22  
35  
V
CC  
CC  
2Y7 23  
34 2A7  
33 2A8  
32 GND  
31 2A9  
30 2A10  
29 2OE2  
2Y8 24  
GND 25  
2Y9 26  
2Y10 27  
2OE1 28  
When V  
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup resistor;  
CC  
The SN54ABT16827 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT16827 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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