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SN74ABT16540A PDF预览

SN74ABT16540A

更新时间： 2024-10-27 23:06:11
品牌 Logo 应用领域
德州仪器 - TI 驱动器输出元件
页数 文件大小 规格书
6页 108K
描述
16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

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SN74ABT16540A 数据手册

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SN54ABT16540, SN74ABT16540A  
16-BIT BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS208C – FEBRUARY 1991 – REVISED APRIL 1997  
SN54ABT16540 . . . WD PACKAGE  
SN74ABT16540A . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1OE1  
1Y1  
1Y2  
GND  
1Y3  
1Y4  
1OE2  
1A1  
1A2  
GND  
1A3  
1A4  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
2
3
Typical V  
< 1 V at V  
(Output Ground Bounce)  
4
OLP  
CC  
= 5 V, T = 25°C  
5
A
6
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
7
V
V
CC  
CC  
8
1Y5  
1Y6  
GND  
1Y7  
1Y8  
2Y1  
2Y2  
GND  
2Y3  
2Y4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
Flow-Through Architecture Optimizes PCB  
Layout  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL), Thin Shrink  
Small-Outline (DGG), and Thin Very  
Small-Outline (DGV) Packages, and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
V
V
CC  
CC  
description  
2Y5  
2Y6  
GND  
2Y7  
2Y8  
2A5  
2A6  
GND  
2A7  
2A8  
The SN54ABT16540 and SN74ABT16540A are  
inverting 16-bit buffers/drivers composed of two  
8-bit sections with separate output-enable gates.  
These buffers and bus drivers provide a  
high-performance bus interface for wide data  
paths.  
2OE1  
2OE2  
The 3-state control gate is a 2-input AND gate with  
active-low inputs so that if either output-enable  
(OE1 or OE2) input is high, all corresponding  
outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN54ABT16540 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT16540A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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