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SN74ABT16374ADL

更新时间： 2024-11-25 23:06:11
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
11页 195K
描述
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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中文翻译

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SN74ABT16374ADL 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SSOP
包装说明：SSOP, SSOP48,.4针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.06其他特性：TYP VOLP < 0.8V @ VCC = 5V, TA = 25 DEG C
控制类型：INDEPENDENT CONTROL计数方向：UNIDIRECTIONAL
系列：ABTJESD-30 代码：R-PDSO-G48
JESD-609代码：e4长度：15.88 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
最大频率@ Nom-Sup：150000000 Hz最大I（ol）：0.064 A
湿度敏感等级：1位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：SSOP封装等效代码：SSOP48,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, SHRINK PITCH
包装方法：TUBE峰值回流温度（摄氏度）：260
电源：5 V最大电源电流（ICC）：72 mA
Prop。Delay @ Nom-Sup：6.2 ns传播延迟（tpd）：5.9 ns
认证状态：Not Qualified座面最大高度：2.79 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：BICMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.635 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：7.49 mmBase Number Matches：1

SN74ABT16374ADL 数据手册

 浏览型号SN74ABT16374ADL的Datasheet PDF文件第2页浏览型号SN74ABT16374ADL的Datasheet PDF文件第3页浏览型号SN74ABT16374ADL的Datasheet PDF文件第4页浏览型号SN74ABT16374ADL的Datasheet PDF文件第5页浏览型号SN74ABT16374ADL的Datasheet PDF文件第6页浏览型号SN74ABT16374ADL的Datasheet PDF文件第7页 
SN54ABT16374A, SN74ABT16374A  
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCBS205C – MARCH 1993 – REVISED MAY 1997  
SN54ABT16374A . . . WD PACKAGE  
SN74ABT16374A . . . DGG OR DL PACKAGE  
(TOP VIEW)  
Members of the Texas Instruments  
Widebus Family  
State-of-the-Art EPIC-ΙΙB BiCMOS Design  
Significantly Reduces Power Dissipation  
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
1CLK  
1
2
3
4
5
6
7
8
9
48  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015  
47 1D1  
46 1D2  
45 GND  
44 1D3  
43 1D4  
Latch-Up Performance Exceeds 500 mA Per  
JEDEC Standard JESD-17  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
V
42  
V
= 5 V, T = 25°C  
CC  
CC  
CC  
A
1Q5  
1Q6  
41 1D5  
40 1D6  
39 GND  
38 1D7  
37 1D8  
36 2D1  
35 2D2  
34 GND  
33 2D3  
32 2D4  
High-Impedance State During Power Up  
and Power Down  
GND 10  
1Q7 11  
1Q8 12  
2Q1 13  
2Q2 14  
GND 15  
2Q3 16  
2Q4 17  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
Flow-Through Architecture Optimizes PCB  
Layout  
High-Drive Outputs (–32-mA I , 64-mA I  
OH  
)
OL  
Package Options Include Plastic 300-mil  
Shrink Small-Outline (DL) and Thin Shrink  
Small-Outline (DGG) Packages and 380-mil  
Fine-Pitch Ceramic Flat (WD) Package  
Using 25-mil Center-to-Center Spacings  
V
18  
31  
V
CC  
CC  
2Q5 19  
2Q6 20  
GND 21  
2Q7 22  
2Q8 23  
2OE 24  
30 2D5  
29 2D6  
28 GND  
27 2D7  
26 2D8  
25 2CLK  
description  
The ’ABT16374A are 16-bit edge-triggered  
D-type flip-flops with 3-state outputs designed  
specifically for driving highly capacitive or  
relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock  
(CLK) input, the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive  
the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus  
lines without need for interface or pullup components  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
When V  
is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 2.1 V, OE should be tied to V  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup resistor;  
CC  
The SN54ABT16374A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74ABT16374A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.  
Copyright 1997, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...11

中文翻译

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SN74ABT16374ADL 替代型号

型号 品牌 替代类型 描述 数据表
SN74ABT16374ADLG4 TI

类似代替

 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ABT16374ADLR TI

类似代替

 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ABT16374ADLRG4 TI

类似代替

 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

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 		16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN74ABT16374ADLR TI

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SN74ABT16374ADLRG4 TI

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SN74ABT16374DGGR TI

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SN74ABT16374DL TI

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SN74ABT16374DLR TI

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 		16-Bit Edge-Triggered D-Type Flip-Flops With 3-State Outputs 48-SSOP -40 to 85
SN74ABT16470 TI

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SN74ABT16470DGG TI

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SN74ABT16470DGGR TI

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SN74ABT16470DL TI

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