SN54ABT162500, SN74ABT162500
18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS242E – JUNE 1992 – REVISED FEBRUARY 1999
SN54ABT162500 . . . WD PACKAGE
SN74ABT162500 . . . DL PACKAGE
(TOP VIEW)
Members of the Texas Instruments
Widebus Family
B-Port Outputs Have Equivalent 25-Ω
Series Resistors, So No External Resistors
Are Required
OEAB
LEAB
A1
GND
A2
GND
CLKAB
B1
GND
B2
1
2
3
4
5
6
7
8
9
56
55
54
53
52
51
50
49
48
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
UBT (Universal Bus Transceiver)
Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, or Clocked Mode
A3
B3
V
V
CC
CC
A4
A5
B4
B5
Typical V
< 0.8 V at V
(Output Ground Bounce)
OLP
A6 10
47 B6
= 5 V, T = 25°C
CC
A
GND
A7
GND
B7
11
12
46
45
High-Impedance State During Power Up
and Power Down
A8 13
A9 14
44 B8
Flow-Through Architecture Optimizes PCB
Layout
43 B9
A10 15
A11 16
A12 17
GND 18
A13 19
42 B10
41 B11
40 B12
39 GND
38 B13
Latch-Up Performance Exceeds 500 mA
Per JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
A14
A15 21
22
20
37
B14
36 B15
35
Package Options Include Plastic Shrink
Small-Outline (DL) Package and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
V
V
CC
CC
A16 23
A17 24
34 B16
33 B17
GND 25
A18 26
32 GND
31 B18
description
OEBA 27
LEBA 28
30 CLKBA
29 GND
These 18-bit universal bus transceivers combine
D-type latches and D-type flip-flops to allow data
flow in transparent, latched, and clocked modes.
Data flow in each direction is controlled by
output-enable (OEAB and OEBA), latch-enable
(LEAB and LEBA), and clock (CLKAB and
CLKBA) inputs.
For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the
A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the
latch/flip-flop on the high-to-low transition of CLKAB. Output-enable OEAB is active high. When OEAB is high,
the outputs are active. When OEAB is low, the outputs are in the high-impedance state.
Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, and CLKBA. The output enables are
complementary (OEAB is active high and OEBA is active low).
The B-port outputs, which are designed to source or sink up to 12 mA, include equivalent 25-Ω series resistors
to reduce overshoot and undershoot.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, EPIC-ΙΙB, and UBT are trademarks of Texas Instruments Incorporated.
Copyright 1999, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265