5秒后页面跳转
捷配首页

Datasheet > 驱动程序和接口 > 线路驱动器或接收器> SN65LVDT9637AD
SN65LVDT9637AD PDF预览

SN65LVDT9637AD

更新时间： 2024-11-23 22:20:19
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口
页数 文件大小 规格书
14页 193K
描述
HIGH-SPEED DIFFERENTIAL RECEIVERS

阅读下载

中文翻译

获取价格

SN65LVDT9637AD 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：PLASTIC, SO-8针数：8
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：7.37Is Samacsys：N
差分输出：YES输入特性：DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型：LINE RECEIVER接口标准：EIA-644; TIA-644
JESD-30 代码：R-PDSO-G8长度：4.9 mm
功能数量：2端子数量：8
最高工作温度：85 °C最低工作温度：-40 °C
最大输出低电流：0.008 A封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：3.3 V
认证状态：Not Qualified最大接收延迟：6 ns
接收器位数：2座面最大高度：1.75 mm
子类别：Line Driver or Receivers最大压摆率：12 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：3.9 mmBase Number Matches：1

SN65LVDT9637AD 数据手册

 浏览型号SN65LVDT9637AD的Datasheet PDF文件第2页浏览型号SN65LVDT9637AD的Datasheet PDF文件第3页浏览型号SN65LVDT9637AD的Datasheet PDF文件第4页浏览型号SN65LVDT9637AD的Datasheet PDF文件第5页浏览型号SN65LVDT9637AD的Datasheet PDF文件第6页浏览型号SN65LVDT9637AD的Datasheet PDF文件第7页 
SN65LVDS32A, SN65LVDT32A, SN65LVDS3486A  
SN65LVDT3486A, SN65LVDS9637A, SN65LVDT9637A  
HIGH-SPEED DIFFERENTIAL RECEIVERS  
SLLS368C – JULY 1999 – REVISED JANUARY 2000  
SN65LVDS32A  
SN65LVDT32A  
Meets or Exceeds the Requirements of  
ANSI EIA/TIA-644 Standard for Signaling  
Rates Up to 400 Mbps  
D PACKAGE  
(TOP VIEW)  
Logic Diagram  
(positive logic)  
†
Operates With a Single 3.3 V Supply  
G
G
1B  
1A  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
–2 V to 4.4 V Common-Mode Input Voltage  
Range  
4B  
4A  
4Y  
G
SN65LVDT32A  
ONLY (4 Places)  
1A  
1Y  
Differential Input Thresholds <50 mV With  
50 mV of Hysteresis Over Entire  
Common-Mode Input Voltage Range  
1Y  
G
1B  
2Y  
2A  
11 3Y  
10 3A  
2A  
2B  
Integrated 110Ω Line Termination Resistors  
Offered With the LVDT Series  
2B  
2Y  
3Y  
4Y  
9
GND  
3B  
Propagation Delay Times 4 ns (typ)  
3A  
3B  
4A  
4B  
Open-Circuit and Terminated Fail Safe  
Assures a High-Level Output With No Input  
Bus-Pin ESD Protection Exceeds 15 kV  
HBM  
Outputs High-Impedance With V  
< 1.5 V  
CC  
Power Dissipation <400 mW With Four  
Receivers Switching at 200 MHz  
SN65LVDS3486A  
SN65LVDT3486A  
D PACKAGE  
(TOP VIEW)  
Logic Diagram  
(positive logic)  
Available in Small-Outline Package With  
1,27 mm Terminal Pitch  
SN65LVDT3486A  
Pin-Compatible With the AM26LS32,  
MC3486, or uA9637  
1B  
1A  
V
CC  
4B  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
ONLY (4 Places)  
1A  
1B  
1Y  
1Y  
4A  
1,2EN  
description  
1,2EN  
2Y  
4Y  
2A  
2B  
3,4EN  
2Y  
3Y  
4Y  
This family of differential line receivers offer  
improved performance and features that imple-  
ment the electrical characteristics of low-voltage  
differential signaling (LVDS). LVDS is defined in  
the TIA/EIA-644 standard. This improved perfor-  
mance represents the second generation of  
receiver products for this standard providing a  
better overall solution for the cabled environment.  
The next generation family of products is an  
extension to TI’s overall product portfolio and is  
not necessarily a replacement for older LVDS  
receivers.  
2A  
11 3Y  
10 3A  
2B  
3A  
3B  
GND  
9
3B  
3,4EN  
4A  
4B  
SN65LVDS9637A  
SN65LVDT9637A  
D PACKAGE  
(TOP VIEW)  
Logic Diagram  
(positive logic)  
Improved features include an input common-  
mode voltage range 2 V wider than the minimum  
required by the standard. This will allow longer  
cable lengths by tripling the allowable ground  
noise tolerance to 3 V between a driver and  
receiver.  
V
1A  
1
2
3
4
8
7
6
5
CC  
1A  
1Y  
2Y  
1B  
1Y  
2Y  
2A  
2B  
1B  
SN65LVDT9637A  
GND  
ONLY  
2A  
2B  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
†
Signaling rate, 1/t, where t is the minimum unit interval and is expressed in the units bits/s (bits per second)  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

中文翻译

下载PDF

SN65LVDT9637AD 替代型号

型号 品牌 替代类型 描述 数据表
DS90LV028ATM/NOPB TI

类似代替

 DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver
SN65LVDS9638D TI

类似代替

 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS9637D TI

类似代替

 HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

与SN65LVDT9637AD相关器件

型号 品牌 获取价格 描述 数据表
SN65LVDT9637ADR TI

获取价格

 		High-Speed Differential Receivers 8-SOIC -40 to 85
SN65LVDT9637B TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDT9637BD TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDT9637BDG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDT9637BDR TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDT9637BDRG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVDTS33D TI

获取价格

 		HIGH-SPEED DIFFERENTIAL RECEIVERS
SN65LVEL11 TI

获取价格

 		3.3 V ECL 1:2 Fanout Buffer
SN65LVEL11_09 TI

获取价格

 		3.3 V ECL 1:2 Fanout Buffer
SN65LVEL11_10 TI

获取价格

 		3.3 V ECL 1:2 Fanout Buffer

与SN65LVDT9637AD相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证