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Datasheet > 驱动程序和接口 > 线路驱动器或接收器> SN65LVDT101DGK
SN65LVDT101DGK PDF预览

SN65LVDT101DGK

更新时间： 2024-11-25 12:15:03
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路中继器光电二极管
页数 文件大小 规格书
25页 1062K
描述
DIFFERENTIAL TRANSLATOR/REPEATER

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中文翻译

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SN65LVDT101DGK 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Active零件包装代码：MSOP
包装说明：VSSOP-8针数：8
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：1.33Is Samacsys：N
差分输出：YES驱动器位数：1
输入特性：DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型：LINE TRANSCEIVER
接口标准：EIA-644-A; TIA-644-AJESD-30 代码：R-PDSO-G8
JESD-609代码：e4长度：3 mm
湿度敏感等级：1功能数量：1
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C输出特性：DIFFERENTIAL
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP8,.19
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified最大接收延迟：0.9 ns
接收器位数：1座面最大高度：1.1 mm
子类别：Line Driver or Receivers最大压摆率：61 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V电源电压1-最大：3.6 V
电源电压1-分钟：3 V电源电压1-Nom：3.3 V
表面贴装：YES技术：BIPOLAR
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
最大传输延迟：0.9 ns宽度：3 mm
Base Number Matches：1

SN65LVDT101DGK 数据手册

 浏览型号SN65LVDT101DGK的Datasheet PDF文件第2页浏览型号SN65LVDT101DGK的Datasheet PDF文件第3页浏览型号SN65LVDT101DGK的Datasheet PDF文件第4页浏览型号SN65LVDT101DGK的Datasheet PDF文件第5页浏览型号SN65LVDT101DGK的Datasheet PDF文件第6页浏览型号SN65LVDT101DGK的Datasheet PDF文件第7页 
SN65LVDS100, SN65LVDT100  
SN65LVDS101, SN65LVDT101  
www.ti.com  
SLLS516C–AUGUST 2002–REVISED JUNE 2004  
DIFFERENTIAL TRANSLATOR/REPEATER  
FEATURES  
DESCRIPTION  
•
•
•
•
•
Designed for Signaling Rates (1) ≥ 2 Gbps  
Total Jitter < 65 ps  
The SN65LVDS100, SN65LVDT100, SN65LVDS101,  
and SN65LVDT101 are a high-speed differential re-  
ceiver and driver connected as a repeater. The  
receiver accepts low-voltage differential signaling  
(LVDS), positive-emitter-coupled logic (PECL), or cur-  
rent-mode logic (CML) input signals at rates up to 2  
Gbps and repeats it as either an LVDS or PECL  
output signal. The signal path through the device is  
differential for low radiated emissions and minimal  
added jitter.  
Low-Power Alternative for the MC100EP16  
Low 100 ps (Max) Part-To-Part Skew  
25 mV of Receiver Input Threshold Hysteresis  
Over 0-V to 4-V Common-Mode Range  
•
Inputs Electrically Compatible With LVPECL,  
CML, and LVDS Signal Levels  
•
•
•
3.3-V Supply Operation  
The  
outputs  
of  
the  
SN65LVDS100  
and  
LVDT Integrates 110-Ω Terminating Resistor  
Offered in SOIC and MSOP  
SN65LVDT100 are LVDS levels as defined by  
TIA/EIA-644-A. The outputs of the SN65LVDS101  
and SN65LVDT101 are compatible with 3.3-V PECL  
levels. Both drive differential transmission lines with  
nominally 100-Ω characteristic impedance.  
APPLICATIONS  
•
•
•
•
•
622 MHz Central Office Clock Distribution  
High-Speed Network Routing  
Wireless Basestations  
Low Jitter Clock Repeater  
Serdes LVPECL Output to FPGA LVDS  
Input Translator  
The SN65LVDT100 and SN65LVDT101 include a  
110-Ω differential line termination resistor for less  
board space, fewer components, and the shortest  
stub length possible. They do not include the VBB  
voltage reference found in the SN65LVDS100 and  
SN65LVDS101. VBB provides a voltage reference of  
typically 1.35 V below VCC for use in receiving  
single-ended input signals and is particularly useful  
with single-ended 3.3-V PECL inputs. When not used,  
VBB should be unconnected or open.  
(1) The signaling rate of a line is the number of voltage  
transitions that are made per second expressed in the units  
bps (bits per second).  
All devices are characterized for operation from  
–40°C to 85°C.  
FUNCTIONAL DIAGRAM  
EYE PATTERN  
SN65LVDS100 and SN65LVDS101  
8
2
4
2 Gbps  
- 1 PRBS  
V
V
BB  
CC  
23  
2
A
7
6
Y
V
= 3.3 V  
CC  
V
= 200 mV  
ID  
Z
V
IC  
= 1.2 V  
3
B
Vert.Scale= 200 mV/div  
SN65LVDT100 and SN65LVDT101  
1 GHz  
2
A
7
Y
Z
110 Ω  
6
3
B
Horizontal Scale= 200 ps/div  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
UNLESS OTHERWISE NOTED this document contains PRO-  
Copyright © 2002–2004, Texas Instruments Incorporated  
DUCTION DATA information current as of publication date. Prod-  
ucts conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily  
include testing of all parameters.  
1234567...25

中文翻译

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SN65LVDT101DGK 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVDS100DGKR TI

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SN65LVDT100DGK TI

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