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SN65LVDS9637D PDF预览

SN65LVDS9637D

更新时间： 2024-01-25 09:23:24
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管PC
页数 文件大小 规格书
37页 911K
描述
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

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SN65LVDS9637D 技术参数

生命周期：Obsolete包装说明：HTSSOP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.62
差分输出：YES驱动器位数：1
输入特性：DIFFERENTIAL接口集成电路类型：LINE TRANSCEIVER
接口标准：EIA-422; EIA-485JESD-30 代码：R-PDSO-G8
长度：3 mm功能数量：2
端子数量：8最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：HTSSOP封装形状：SQUARE
封装形式：SMALL OUTLINE, HEAT SINK/SLUG, THIN PROFILE, SHRINK PITCH认证状态：Not Qualified
接收器位数：1座面最大高度：1.07 mm
标称供电电压：3.3 V表面贴装：YES
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
宽度：3 mmBase Number Matches：1

SN65LVDS9637D 数据手册

 浏览型号SN65LVDS9637D的Datasheet PDF文件第2页浏览型号SN65LVDS9637D的Datasheet PDF文件第3页浏览型号SN65LVDS9637D的Datasheet PDF文件第4页浏览型号SN65LVDS9637D的Datasheet PDF文件第5页浏览型号SN65LVDS9637D的Datasheet PDF文件第6页浏览型号SN65LVDS9637D的Datasheet PDF文件第7页 
ꢀ ꢁꢂꢂ ꢃꢄꢅ ꢀꢆ ꢇ ꢈ ꢀꢁ ꢉꢂ ꢃꢄꢅ ꢀꢆ ꢇ ꢈ ꢀꢁ ꢉꢂ ꢃꢄꢅ ꢀꢆ ꢊ ꢋ ꢉ ꢈ ꢀꢁ ꢉꢂ ꢃꢄ ꢅꢀ ꢌꢉ ꢆꢍ  
ꢎꢏ ꢐꢎ ꢑꢀꢒꢓ ꢓꢅ ꢅꢏ ꢔꢔ ꢓꢕ ꢓꢁꢖ ꢏꢗ ꢃ ꢃ ꢏꢁꢓ ꢕꢓꢘ ꢓ ꢏꢄ ꢓ ꢕꢀ  
ꢙ
ꢙ
SLLS262N − JULY 1997 − REVISED MARCH 2004  
SN55LVDS32 . . . J OR W  
SN65LVDS32 . . . D OR PW  
(Marked as LVDS32 or 65LVDS32)  
D
Meet or Exceed the Requirements of ANSI  
TIA/EIA-644 Standard  
D
Operate With a Single 3.3-V Supply  
(TOP VIEW)  
D
Designed for Signaling Rate of up to  
400 Mbps  
1B  
1A  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
4B  
4A  
4Y  
G
D
D
D
Differential Input Thresholds 100 mV Max  
Typical Propagation Delay Time of 2.1 ns  
1Y  
G
2Y  
Power Dissipation 60 mW Typical Per  
Receiver at 200 MHz  
2A  
11 3Y  
10 3A  
2B  
D
Bus-Terminal ESD Protection Exceeds 8 kV  
GND  
9
3B  
D
Low-Voltage TTL (LVTTL) Logic Output  
Levels  
SN55LVDS32FK  
(TOP VIEW)  
D
D
Pin Compatible With AM26LS32, MC3486,  
and µA9637  
Open-Circuit Fail-Safe  
3
4
2
1
20 19  
description  
1Y  
4A  
4Y  
NC  
G
18  
17  
16  
15  
14  
The  
SN55LVDS32,  
SN65LVDS32,  
G
NC  
2Y  
2A  
5
6
7
SN65LVDS3486, and SN65LVDS9637 are  
differential line receivers that implement the  
electrical characteristics of low-voltage differential  
signaling (LVDS). This signaling technique lowers  
the output voltage levels of 5-V differential  
standard levels (such as EIA/TIA-422B) to reduce  
the power, increase the switching speeds, and  
allow operation with a 3.3-V supply rail. Any of the  
four differential receivers provides a valid logical  
output state with a 100-mV differential input  
voltage within the input common-mode voltage  
range. The input common-mode voltage range  
allows 1 V of ground potential difference between  
two LVDS nodes.  
3Y  
8
9
10 11 12 13  
SN65LVDS3486D (Marked as LVDS3486)  
(TOP VIEW)  
1B  
1A  
V
CC  
4B  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
1Y  
4A  
1,2EN  
2Y  
4Y  
3,4EN  
3Y  
The intended application of these devices and  
signaling technique is both point-to-point and  
multidrop (one driver and multiple receivers) data  
transmission over controlled impedance media of  
approximately 100 Ω. The transmission media  
may be printed-circuit board traces, backplanes,  
or cables. The ultimate rate and distance of  
data transfer depends on the attenuation  
characteristics of the media and the noise  
coupling to the environment.  
2A  
2B  
10 3A  
3B  
GND  
9
SN65LVDS9637D (Marked as DK637 or LVDS37)  
SN65LVDS9637DGN (Marked as L37)  
SN65LVDS9637DGK (Marked as AXF)  
(TOP VIEW)  
V
1A  
1B  
2A  
2B  
1
2
3
4
8
7
6
5
CC  
1Y  
The SN65LVDS32, SN65LVDS3486, and  
SN65LVDS9637 are characterized for operation  
from −40°C to 85°C. The SN55LVDS32 is  
characterized for operation from −55°C to 125°C.  
2Y  
GND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPAD is a trademark of Texas Instruments.  
ꢒꢕ ꢚ ꢅꢛ ꢘ ꢖꢏ ꢚ ꢁ ꢅ ꢗꢖꢗ ꢜꢝ ꢞ ꢟꢠ ꢡ ꢢꢣ ꢜꢟꢝ ꢜꢤ ꢥꢦ ꢠ ꢠ ꢧꢝꢣ ꢢꢤ ꢟꢞ ꢨꢦꢩ ꢪꢜꢥ ꢢꢣ ꢜꢟꢝ ꢫꢢ ꢣꢧ ꢬ  
ꢒꢠ ꢟ ꢫꢦꢥ ꢣ ꢤ ꢥ ꢟꢝ ꢞꢟ ꢠ ꢡ ꢣ ꢟ ꢤ ꢨꢧ ꢥ ꢜꢞ ꢜꢥꢢ ꢣꢜ ꢟꢝꢤ ꢨꢧ ꢠ ꢣꢭ ꢧ ꢣꢧ ꢠ ꢡꢤ ꢟꢞ ꢖꢧꢮ ꢢꢤ ꢏꢝꢤ ꢣꢠ ꢦꢡ ꢧꢝꢣ ꢤ  
ꢤ ꢣ ꢢ ꢝꢫ ꢢ ꢠꢫ ꢯ ꢢ ꢠꢠ ꢢ ꢝ ꢣꢰꢬ ꢒꢠ ꢟ ꢫꢦꢥ ꢣꢜꢟꢝ ꢨꢠ ꢟꢥ ꢧꢤ ꢤꢜ ꢝꢱ ꢫꢟꢧ ꢤ ꢝꢟꢣ ꢝꢧ ꢥꢧ ꢤꢤ ꢢꢠ ꢜꢪ ꢰ ꢜꢝꢥ ꢪꢦꢫ ꢧ  
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢬ  
Copyright 1997 − 2004, Texas Instruments Incorporated  
ꢚ ꢝ ꢨ ꢠ ꢟꢫ ꢦꢥ ꢣꢤ ꢥꢟ ꢡꢨ ꢪꢜ ꢢꢝ ꢣ ꢣꢟ ꢲꢏ ꢃꢑ ꢒꢕ ꢔ ꢑꢆꢋꢂ ꢆꢂꢈ ꢢꢪꢪ ꢨꢢ ꢠ ꢢ ꢡꢧ ꢣꢧꢠ ꢤ ꢢ ꢠ ꢧ ꢣꢧ ꢤꢣꢧ ꢫ  
ꢦ ꢝꢪ ꢧꢤꢤ ꢟ ꢣꢭꢧ ꢠ ꢯꢜ ꢤꢧ ꢝ ꢟꢣꢧ ꢫꢬ ꢚ ꢝ ꢢꢪ ꢪ ꢟ ꢣꢭꢧ ꢠ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢤ ꢈ ꢨꢠ ꢟ ꢫꢦꢥ ꢣꢜꢟ ꢝ  
ꢨ ꢠ ꢟꢥꢧ ꢤꢤꢜ ꢝꢱ ꢫ ꢟꢧꢤ ꢝ ꢟꢣ ꢝ ꢧꢥꢧꢤ ꢤꢢꢠ ꢜ ꢪꢰ ꢜ ꢝꢥꢪ ꢦ ꢫꢧ ꢣꢧꢤ ꢣꢜꢝ ꢱ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡꢧ ꢣꢧꢠ ꢤ ꢬ  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...37

中文翻译

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SN65LVDS9637D 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVDS9638DGKRG4 TI

完全替代

 HIGH-SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS9638DR TI

完全替代

 HIGH SPEED DIFFERENTIAL LINE DRIVERS
SN65LVDS9638DGNR TI

完全替代

 HIGH SPEED DIFFERENTIAL LINE DRIVERS

与SN65LVDS9637D相关器件

型号 品牌 获取价格 描述 数据表
SN65LVDS9637DG4 TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGK TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGKG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGKR TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGKRG4 TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGN TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGNG4 TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGNR TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DGNRG4 TI

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 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN65LVDS9637DR TI

获取价格

 		HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

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