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SN65LVDS93IDGG PDF预览

SN65LVDS93IDGG

更新时间： 2024-11-21 20:10:39
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
16页 530K
描述
5 LINE TRANSCEIVER, PDSO56

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SN65LVDS93IDGG 技术参数

生命周期：Obsolete包装说明：TSSOP,
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.68
差分输出：YES驱动器位数：1
输入特性：STANDARD接口集成电路类型：LINE TRANSCEIVER
接口标准：GENERAL PURPOSEJESD-30 代码：R-PDSO-G56
长度：14 mm功能数量：5
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH认证状态：Not Qualified
座面最大高度：1.2 mm标称供电电压：3.3 V
表面贴装：YES温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL宽度：6.1 mm
Base Number Matches：1

SN65LVDS93IDGG 数据手册

 浏览型号SN65LVDS93IDGG的Datasheet PDF文件第2页浏览型号SN65LVDS93IDGG的Datasheet PDF文件第3页浏览型号SN65LVDS93IDGG的Datasheet PDF文件第4页浏览型号SN65LVDS93IDGG的Datasheet PDF文件第5页浏览型号SN65LVDS93IDGG的Datasheet PDF文件第6页浏览型号SN65LVDS93IDGG的Datasheet PDF文件第7页 
SN65LVDS93  
www.ti.com ................................................................................................................................................................. SLLS302G–MAY 1998–REVISED MAY 2009  
LVDS SERDES TRANSMITTER  
When transmitting, data bits D0 through D27 are  
each loaded into registers upon the edge of the input  
clock signal (CLKIN). The rising or falling edge of the  
clock can be selected via the clock select (CLKSEL)  
pin. The frequency of CLKIN is multiplied seven times  
and then used to serially unload the data registers in  
1
FEATURES  
•
•
•
28:4 Data Channel Compression at up to  
1.904 Gigabits per Second Throughput  
Suited for Point-to-Point Subsystem  
Communication With Very Low EMI  
7-bit slices. The four serial streams and  
a
28 Data Channels Plus Clock in Low-Voltage  
TTL and 4 Data Channels Plus Clock Out  
Low-Voltage Differential  
phase-locked clock (CLKOUT) are then output to  
LVDS output drivers. The frequency of CLKOUT is  
the same as the input clock, CLKIN.  
•
Selectable Rising or Falling Clock Edge  
Triggered Inputs  
DGG PACKAGE  
(TOP VIEW)  
•
•
Bus Pins Tolerate 6-kV HBM ESD  
Operates From a Single 3.3-V Supply and  
250 mW (Typ)  
V
D4  
1
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
CC  
D5  
D6  
D3  
D2  
2
3
•
•
5-V Tolerant Data Inputs  
D7  
GND  
D8  
GND  
D1  
4
Packaged in Thin Shrink Small-Outline  
Package With 20 Mil Terminal Pitch  
5
D0  
6
•
•
Consumes <1 mW When Disabled  
D9  
D10  
D27  
LVDSGND  
Y1M  
Y1P  
Y2M  
Y2P  
7
8
Wide Phase-Lock Input Frequency Range  
20 MHz to 68 MHz  
V
CC  
9
D11  
D12  
D13  
10  
11  
12  
•
•
No External Components Required for PLL  
Outputs Meet or Exceed the Requirements of  
ANSI EIA/TIA-644 Standard  
GND 13  
44 LVDSV  
CC  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
D14  
D15  
LVDSGND  
Y3M  
•
•
Industrial Temperature Qualified TA = –40°C  
to 85°C  
D16  
CLKSEL  
D17  
Y3P  
Replacement for the DS90CR285  
CLKOUTM  
CLKOUTP  
Y4M  
DESCRIPTION  
D18  
D19  
GND  
D20  
Y4P  
LVDSGND  
PLLGND  
The SN65LVDS93 LVDS serdes (serializer/  
deserializer) transmitter contains four 7-bit parallel-  
load serial-out shift registers, a 7
נ
clock synthesizer,  
and five low-voltage differential signaling (LVDS)  
drivers in a single integrated circuit. These functions  
allow 28 bits of single-ended LVTTL data to be  
synchronously transmitted over five balanced-pair  
conductors for receipt by a compatible receiver, such  
as the SN65LVDS94.  
D21  
D22  
PLLV  
CC  
PLLGND  
SHTDN  
CLKIN  
D26  
D23  
V
CC  
D24  
D25  
GND  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2009, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
1234567...16

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