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SN65LVDM180PWR PDF预览

SN65LVDM180PWR

更新时间： 2024-11-27 05:18:07
品牌 Logo 应用领域
德州仪器 - TI 驱动器
页数 文件大小 规格书
26页 1169K
描述
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS

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SN65LVDM180PWR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：TSSOP
包装说明：TSSOP, TSSOP14,.25针数：14
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：6 weeks
风险等级：5.45差分输出：YES
驱动器位数：1高电平输入电流最大值：0.00002 A
输入特性：DIFFERENTIAL接口集成电路类型：LINE TRANSCEIVER
接口标准：GENERAL PURPOSEJESD-30 代码：R-PDSO-G14
JESD-609代码：e4长度：5 mm
湿度敏感等级：1功能数量：1
端子数量：14最高工作温度：85 °C
最低工作温度：-40 °C最小输出摆幅：0.247 V
输出特性：DIFFERENTIAL最大输出低电流：0.008 A
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP14,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260电源：3.3 V
认证状态：Not Qualified最大接收延迟：4.5 ns
接收器位数：1座面最大高度：1.2 mm
子类别：Line Driver or Receivers最大压摆率：12 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V电源电压1-最大：3.6 V
电源电压1-分钟：3 V电源电压1-Nom：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
最大传输延迟：2.7 ns宽度：4.4 mm
Base Number Matches：1

SN65LVDM180PWR 数据手册

 浏览型号SN65LVDM180PWR的Datasheet PDF文件第2页浏览型号SN65LVDM180PWR的Datasheet PDF文件第3页浏览型号SN65LVDM180PWR的Datasheet PDF文件第4页浏览型号SN65LVDM180PWR的Datasheet PDF文件第5页浏览型号SN65LVDM180PWR的Datasheet PDF文件第6页浏览型号SN65LVDM180PWR的Datasheet PDF文件第7页 
SN65LVDM179, SN65LVDM180  
SN65LVDM050, SN65LVDM051  
www.ti.com  
SLLS324G–DECEMBER 1998–REVISED APRIL 2007  
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS  
FEATURES  
SN65LVDM179D (Marked as DM179 or LVM179)  
SN65LVDM179DGK (Marked as M79)  
(TOP VIEW)  
•
Low-Voltage Differential 50-Ω Line Drivers and  
Receivers  
5
6
8
7
•
Typical Signaling Rates of 500 Mbps (see  
Table 1)  
3
Y
Z
V
A
B
Z
Y
1
2
3
4
8
7
6
5
CC  
D
R
R
D
•
•
•
Bus-Terminal ESD Exceeds 12 kV  
Operates From a Single 3.3-V Supply  
A
B
2
GND  
Low-Voltage Differential Signaling With  
Typical Output Voltages of 340 mV With a  
50-Ω Load  
SN65LVDM180D (Marked as LVDM180)  
SN65LVDM180PW (Marked as LVDM180)  
(TOP VIEW)  
•
•
Valid Output With as Little as 50-mV Input  
Voltage Difference  
9
NC  
R
RE  
V
V
A
B
Z
Y
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
CC  
5
Y
Z
D
10  
CC  
4
3
Propagation Delay Times  
DE  
RE  
–
–
Driver: 1.7 ns Typical  
DE  
D
12  
11  
A
B
2
Receiver: 3.7 ns Typical  
R
GND  
GND  
•
Power Dissipation at 200 MHz  
NC  
8
–
–
Driver: 50 mW Typical  
Receiver: 60 mW Typical  
SN65LVDM050D (Marked as LVDM050)  
SN65LVDM050PW (Marked as LVDM050)  
(TOP VIEW)  
•
•
LVTTL Input Levels Are 5-V Tolerant  
14  
13  
Driver Is High Impedance When Disabled or  
With VCC < 1.5 V  
15  
1Y  
1Z  
1D  
1B  
1A  
1R  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
12  
9
1D  
1Y  
1Z  
DE  
2Z  
•
Receiver Has Open-Circuit Failsafe  
DE  
2D  
10  
11  
2Y  
2Z  
RE  
2R  
DESCRIPTION  
2
1
The  
SN65LVDM179,  
SN65LVDM180,  
3
1A  
1B  
2A  
1R  
SN65LVDM050, and SN65LVDM051 are differential  
line drivers and receivers that use low-voltage  
differential signaling (LVDS) to achieve high  
signaling rates. These circuits are similar to  
2B  
GND  
10 2Y  
2D  
4
5
RE  
2R  
9
6
7
2A  
2B  
TIA/EIA-644  
standard  
compliant  
devices  
SN65LVDM051D (Marked as LVDM051)  
SN65LVDM051PW (Marked as LVDM051)  
(TOP VIEW)  
(SN65LVDS) counterparts, except that the output  
current of the drivers is doubled. This modification  
provides  
magnitude of 247 mV across a 50-Ω load simulating  
two transmission lines in parallel. This allows having  
data buses with more than one driver or with two line  
termination resistors. The receivers detect a voltage  
difference of 50 mV with up to 1 V of ground  
potential difference between  
receiver.  
14  
13  
15  
1Y  
1Z  
a minimum differential output voltage  
1D  
1B  
1A  
1R  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
4
3
1D  
1Y  
1DE  
1R  
2
1
1A  
1B  
1DE  
2R  
1Z  
2DE  
2Z  
10  
11  
a transmitter and  
9
2Y  
2Z  
2A  
2D  
2B  
GND  
10 2Y  
2D  
12  
5
2DE  
2R  
6
7
The intended application of these devices and  
signaling techniques is point-to-point half duplex,  
baseband data transmission over  
9
2A  
2B  
a controlled  
impedance media of approximately 100  
characteristic impedance.  
Ω
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1998–2007, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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中文翻译

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SN65LVDM180PWR 替代型号

型号 品牌 替代类型 描述 数据表
SN65LVDM180PWG4 TI

完全替代

 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SN65LVDM180PW TI

完全替代

 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
SN65LVDM180PWRG4 TI

类似代替

 HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS

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