SN65LVDM179, SN65LVDM180
SN65LVDM050, SN65LVDM051
www.ti.com
SLLS324G–DECEMBER 1998–REVISED APRIL 2007
HIGH-SPEED DIFFERENTIAL LINE DRIVERS AND RECEIVERS
FEATURES
SN65LVDM179D (Marked as DM179 or LVM179)
SN65LVDM179DGK (Marked as M79)
(TOP VIEW)
•
Low-Voltage Differential 50-Ω Line Drivers and
Receivers
5
6
8
7
•
Typical Signaling Rates of 500 Mbps (see
Table 1)
3
Y
Z
V
A
B
Z
Y
1
2
3
4
8
7
6
5
CC
D
R
R
D
•
•
•
Bus-Terminal ESD Exceeds 12 kV
Operates From a Single 3.3-V Supply
A
B
2
GND
Low-Voltage Differential Signaling With
Typical Output Voltages of 340 mV With a
50-Ω Load
SN65LVDM180D (Marked as LVDM180)
SN65LVDM180PW (Marked as LVDM180)
(TOP VIEW)
•
•
Valid Output With as Little as 50-mV Input
Voltage Difference
9
NC
R
RE
V
V
A
B
Z
Y
1
2
3
4
5
6
7
14
13
12
11
10
9
CC
5
Y
Z
D
10
CC
4
3
Propagation Delay Times
DE
RE
–
–
Driver: 1.7 ns Typical
DE
D
12
11
A
B
2
Receiver: 3.7 ns Typical
R
GND
GND
•
Power Dissipation at 200 MHz
NC
8
–
–
Driver: 50 mW Typical
Receiver: 60 mW Typical
SN65LVDM050D (Marked as LVDM050)
SN65LVDM050PW (Marked as LVDM050)
(TOP VIEW)
•
•
LVTTL Input Levels Are 5-V Tolerant
14
13
Driver Is High Impedance When Disabled or
With VCC < 1.5 V
15
1Y
1Z
1D
1B
1A
1R
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
12
9
1D
1Y
1Z
DE
2Z
•
Receiver Has Open-Circuit Failsafe
DE
2D
10
11
2Y
2Z
RE
2R
DESCRIPTION
2
1
The
SN65LVDM179,
SN65LVDM180,
3
1A
1B
2A
1R
SN65LVDM050, and SN65LVDM051 are differential
line drivers and receivers that use low-voltage
differential signaling (LVDS) to achieve high
signaling rates. These circuits are similar to
2B
GND
10 2Y
2D
4
5
RE
2R
9
6
7
2A
2B
TIA/EIA-644
standard
compliant
devices
SN65LVDM051D (Marked as LVDM051)
SN65LVDM051PW (Marked as LVDM051)
(TOP VIEW)
(SN65LVDS) counterparts, except that the output
current of the drivers is doubled. This modification
provides
magnitude of 247 mV across a 50-Ω load simulating
two transmission lines in parallel. This allows having
data buses with more than one driver or with two line
termination resistors. The receivers detect a voltage
difference of 50 mV with up to 1 V of ground
potential difference between
receiver.
14
13
15
1Y
1Z
a minimum differential output voltage
1D
1B
1A
1R
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
4
3
1D
1Y
1DE
1R
2
1
1A
1B
1DE
2R
1Z
2DE
2Z
10
11
a transmitter and
9
2Y
2Z
2A
2D
2B
GND
10 2Y
2D
12
5
2DE
2R
6
7
The intended application of these devices and
signaling techniques is point-to-point half duplex,
baseband data transmission over
9
2A
2B
a controlled
impedance media of approximately 100
characteristic impedance.
Ω
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Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1998–2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.