5秒后页面跳转
SN65HVD39MDREP PDF预览

SN65HVD39MDREP

更新时间: 2024-11-19 19:02:07
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理光电二极管接口集成电路驱动器
页数 文件大小 规格书
26页 758K
描述
LINE TRANSCEIVER, PDSO14, PLASTIC, MS-012AB, SOIC-14

SN65HVD39MDREP 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOP, SOP14,.25针数:14
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.84
其他特性:SIGNALING RATE 5MBPS差分输出:YES
驱动器位数:1高电平输入电流最大值:0.00006 A
输入特性:DIFFERENTIAL SCHMITT TRIGGER接口集成电路类型:LINE TRANSCEIVER
接口标准:EIA-422-B; TIA-422-B; EIA-485-A; TIA-485-A; V.11JESD-30 代码:R-PDSO-G14
长度:8.65 mm功能数量:1
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C最小输出摆幅:1.5 V
最大输出低电流:0.008 A封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:3.3 V认证状态:Not Qualified
最大接收延迟:70 ns接收器位数:1
座面最大高度:1.75 mm子类别:Line Driver or Receivers
最大压摆率:7 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:BICMOS
温度等级:MILITARY端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
最大传输延迟:65 ns宽度:3.9 mm
Base Number Matches:1

SN65HVD39MDREP 数据手册

 浏览型号SN65HVD39MDREP的Datasheet PDF文件第2页浏览型号SN65HVD39MDREP的Datasheet PDF文件第3页浏览型号SN65HVD39MDREP的Datasheet PDF文件第4页浏览型号SN65HVD39MDREP的Datasheet PDF文件第5页浏览型号SN65HVD39MDREP的Datasheet PDF文件第6页浏览型号SN65HVD39MDREP的Datasheet PDF文件第7页 
SN65HVD30-EP, SN65HVD31-EP, SN65HVD32-EP, SN65HVD33-EP, SN65HVD34-EP  
SN65HVD35-EP, SN65HVD36-EP, SN65HVD37-EP, SN65HVD38-EP, SN65HVD39-EP  
www.ti.com  
SGLS367CSEPTEMBER 2006REVISED MARCH 2007  
3.3-V FULL-DUPLEX RS-485 DRIVERS AND RECEIVERS  
APPLICATIONS  
FEATURES  
Utility Meters  
DTE/DCE Interfaces  
Industrial, Process, and Building Automation  
Point-of-Sale (POS) Terminals and Networks  
Controlled Baseline  
One Assembly Site  
One Test Site  
One Fabrication Site  
Extended Temperature Performance of –55°C  
to 125°C  
DESCRIPTION  
The SN65HVD3x devices are 3-state differential line  
drivers and differential-input line receivers that  
operate with 3.3-V power supply.  
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
Enhanced Product-Change Notification  
Qualification Pedigree(1)  
Each driver and receiver has separate input and  
output pins for full-duplex bus communication  
designs. They are designed for balanced  
transmission lines and interoperation with ANSI  
TIA/EIA-485A, TIA/EIA-422-B, ITU-T v.11, and ISO  
8482:1993 standard-compliant devices.  
Available in the Texas Instruments  
NanoStar™ and NanoFree™ Packages  
1/8 Unit-Load Option Available (up to 256  
Nodes on the Bus)  
The SN65HVD30, SN65HVD31, SN65HVD32,  
SN65HVD36, and SN65HVD37 are fully enabled  
with no external enabling pins. The SN65HVD36 and  
Bus-Pin ESD Protection Exceeds 15-kV HBM  
Optional Driver Output Transition Times for  
Signaling Rates(2) of 1 Mbps, 5 Mbps, and  
25 Mbps  
SN65HVD37 implement  
receiver  
equalization  
technology for improved performance in long  
distance applications.  
Low-Current Standby Mode: <1 µA  
Glitch-Free Power-Up and Power-Down  
Protection for Hot-Plugging Applications  
The SN65HVD33, SN65HVD34, SN65HVD35,  
SN65HVD38, and SN65HVD39 have active-high  
driver enables and active-low receiver enables. A low  
(less than 1 µA) standby current can be achieved by  
disabling both the driver and receiver. The  
SN65HVD38 and SN65HVD39 implement receiver  
equalization technology for improved performance in  
long distance applications.  
5-V-Tolerant Inputs  
Bus Idle, Open, and Short-Circuit Fail Safe  
Driver Current Limiting and Thermal  
Shutdown  
Meet or Exceed the Requirements of ANSI  
TIA/EIA-485-A and RS-422 Compatible  
The SN65HVD36 and SN65HVD38 implement  
receiver equalization technology for improved jitter  
performance on differential bus applications with  
data rates up to 20 Mbps at cable lengths up to 160  
meters.  
(1)  
Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
The SN65HVD37 and SN65HVD39 implement  
receiver equalization technology for improved jitter  
performance on differential bus applications with  
data rates in the range of 1 Mbps to 5 Mbps at cable  
lengths up to 1000 meters.  
(2)  
The signaling rate of a line is the number of voltage  
transitions that are made per second expressed in the units  
bps (bits per second).  
All devices are characterized for operation from  
–55°C to 125°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
NanoStar, NanoFree are trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2006–2007, Texas Instruments Incorporated  

与SN65HVD39MDREP相关器件

型号 品牌 获取价格 描述 数据表
SN65HVD485E TI

获取价格

HALF-DUPLEX RS-485 TRANSCEIVER
SN65HVD485ED TI

获取价格

HALF-DUPLEX RS-485 TRANSCEIVER
SN65HVD485EDG4 TI

获取价格

半双工 RS-485 收发器 | D | 8 | -40 to 85
SN65HVD485EDGK TI

获取价格

HALF-DUPLEX RS-485 TRANSCEIVER
SN65HVD485EDGKR TI

获取价格

暂无描述
SN65HVD485EDR TI

获取价格

HALF-DUPLEX RS-485 TRANSCEIVER
SN65HVD485EDRG4 TI

获取价格

半双工 RS-485 收发器 | D | 8 | -40 to 85
SN65HVD485EP TI

获取价格

HALF-DUPLEX RS-485 TRANSCEIVER
SN65HVD485EPE4 TI

获取价格

半双工 RS-485 收发器 | P | 8 | -40 to 85
SN65HVD50 TI

获取价格

HIGH OUTPUT FULL-DUPLEX RS-485 DRIVERS AND RECEIVERS