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SN65HVD12-EP PDF预览

SN65HVD12-EP

更新时间: 2024-02-23 23:20:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
22页 353K
描述
3.3 V RS-485 TRANSCEIVERS

SN65HVD12-EP 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP8,.3针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:1.21其他特性:SIGNALING RATE 1 MBPS
差分输出:YES驱动器位数:1
高电平输入电流最大值:0.0001 A输入特性:DIFFERENTIAL SCHMITT TRIGGER
接口集成电路类型:LINE TRANSCEIVER接口标准:EIA-485-A; TIA-485-A; ISO 8482
JESD-30 代码:R-PDIP-T8JESD-609代码:e4
长度:9.81 mm功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C最小输出摆幅:1.5 V
输出特性:3-STATE最大输出低电流:0.008 A
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP8,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3 V
认证状态:Not Qualified最大接收延迟:70 ns
接收器位数:1座面最大高度:5.08 mm
子类别:Line Driver or Receivers最大压摆率:15.5 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V电源电压1-最大:3.6 V
电源电压1-分钟:3 V表面贴装:NO
技术:BICMOS温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED最大传输延迟:300 ns
宽度:7.62 mmBase Number Matches:1

SN65HVD12-EP 数据手册

 浏览型号SN65HVD12-EP的Datasheet PDF文件第2页浏览型号SN65HVD12-EP的Datasheet PDF文件第3页浏览型号SN65HVD12-EP的Datasheet PDF文件第4页浏览型号SN65HVD12-EP的Datasheet PDF文件第5页浏览型号SN65HVD12-EP的Datasheet PDF文件第6页浏览型号SN65HVD12-EP的Datasheet PDF文件第7页 
SN65HVD10-EP, SN65HVD11-EP  
SN65HVD12-EP  
www.ti.com  
SGLS278EDECEMBER 2004REVISED SEPTEMBER 2007  
3.3 V RS-485 TRANSCEIVERS  
1
FEATURES  
APPLICATIONS  
Digital Motor Control  
Utility Meters  
Chassis-to-Chassis Interconnects  
Electronic Security Stations  
Industrial Process Control  
Building Automation  
Controlled Baseline  
One Assembly/Test Site  
One Fabrication Site  
Extended Temperature Performance of Up to  
–40°C to 125°C and –55°C to 125°C  
Enhanced Diminishing Manufacturing Sources  
(DMS) Support  
Point-of-Sale (POS) Terminals and Networks  
Enhanced Product-Change Notification  
D PACKAGE  
(TOP VIEW)  
(1)  
Qualification Pedigree  
Operates With a 3.3 V Supply  
R
RE  
DE  
D
VCC  
B
A
1
2
3
4
8
7
6
5
Bus-Pin ESD Protection Exceeds 16 kV HBM  
1/8 Unit-Load Option Available (Up to 256  
Nodes on the Bus)  
GND  
Optional Driver Output Transition Times for  
Signaling Rates of 1 Mbps, 10 Mbps, and  
25 Mbps  
(2)  
DESCRIPTION/ORDERING INFORMATION  
Meets or Exceeds the Requirements of ANSI  
TIA/EIA-485-A  
The SN65HVD10, SN65HVD11, and SN65HVD12  
combine  
a
3-state differential line driver and  
differential input line receiver that operate with a  
single 3.3 V power supply. They are designed for  
balanced transmission lines and meet or exceed  
ANSI standard TIA/EIA-485-A and ISO 8482:1993.  
These differential bus transceivers are monolithic  
integrated circuits designed for bidirectional data  
communication on multipoint bus-transmission lines.  
The drivers and receivers have active-high and  
active-low enables respectively, that can be externally  
connected together to function as direction control.  
Low device standby supply current can be achieved  
by disabling the driver and the receiver.  
Bus-Pin Short Circuit Protection From –7 V to  
12 V  
Low-Current Standby Mode . . . 1 μA (Typ)  
Open-Circuit, Idle-Bus, and Shorted-Bus  
Failsafe Receiver  
Thermal Shutdown Protection  
Glitch-Free Power-Up and Power-Down  
Protection for Hot-Plugging Applications  
SN75176 Footprint  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
The driver differential outputs and receiver differential  
inputs connect internally to form  
a differential  
input/output (I/O) bus port that is designed to offer  
minimum loading to the bus whenever the driver is  
disabled or VCC = 0. These parts feature wide positive  
and negative common-mode voltage ranges, making  
them suitable for party-line applications.  
(2) The signaling rate of a line is the number of voltage  
transitions that are made per second expressed in the units  
bps (bits per second).  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
UNLESS OTHERWISE NOTED this document contains  
Copyright © 2004–2007, Texas Instruments Incorporated  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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