SN65HVD10-EP, SN65HVD11-EP
SN65HVD12-EP
www.ti.com
SGLS278E–DECEMBER 2004–REVISED SEPTEMBER 2007
3.3 V RS-485 TRANSCEIVERS
1
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
Digital Motor Control
Utility Meters
Chassis-to-Chassis Interconnects
Electronic Security Stations
Industrial Process Control
Building Automation
•
Controlled Baseline
–
–
One Assembly/Test Site
One Fabrication Site
•
•
Extended Temperature Performance of Up to
–40°C to 125°C and –55°C to 125°C
Enhanced Diminishing Manufacturing Sources
(DMS) Support
Point-of-Sale (POS) Terminals and Networks
•
•
•
•
•
Enhanced Product-Change Notification
D PACKAGE
(TOP VIEW)
(1)
Qualification Pedigree
Operates With a 3.3 V Supply
R
RE
DE
D
VCC
B
A
1
2
3
4
8
7
6
5
Bus-Pin ESD Protection Exceeds 16 kV HBM
1/8 Unit-Load Option Available (Up to 256
Nodes on the Bus)
GND
•
Optional Driver Output Transition Times for
Signaling Rates of 1 Mbps, 10 Mbps, and
25 Mbps
(2)
DESCRIPTION/ORDERING INFORMATION
•
•
Meets or Exceeds the Requirements of ANSI
TIA/EIA-485-A
The SN65HVD10, SN65HVD11, and SN65HVD12
combine
a
3-state differential line driver and
differential input line receiver that operate with a
single 3.3 V power supply. They are designed for
balanced transmission lines and meet or exceed
ANSI standard TIA/EIA-485-A and ISO 8482:1993.
These differential bus transceivers are monolithic
integrated circuits designed for bidirectional data
communication on multipoint bus-transmission lines.
The drivers and receivers have active-high and
active-low enables respectively, that can be externally
connected together to function as direction control.
Low device standby supply current can be achieved
by disabling the driver and the receiver.
Bus-Pin Short Circuit Protection From –7 V to
12 V
•
•
Low-Current Standby Mode . . . 1 μA (Typ)
Open-Circuit, Idle-Bus, and Shorted-Bus
Failsafe Receiver
•
•
Thermal Shutdown Protection
Glitch-Free Power-Up and Power-Down
Protection for Hot-Plugging Applications
•
SN75176 Footprint
(1) Component qualification in accordance with JEDEC and
industry standards to ensure reliable operation over an
extended temperature range. This includes, but is not limited
to, Highly Accelerated Stress Test (HAST) or biased 85/85,
temperature cycle, autoclave or unbiased HAST,
electromigration, bond intermetallic life, and mold compound
life. Such qualification testing should not be viewed as
justifying use of this component beyond specified
performance and environmental limits.
The driver differential outputs and receiver differential
inputs connect internally to form
a differential
input/output (I/O) bus port that is designed to offer
minimum loading to the bus whenever the driver is
disabled or VCC = 0. These parts feature wide positive
and negative common-mode voltage ranges, making
them suitable for party-line applications.
(2) The signaling rate of a line is the number of voltage
transitions that are made per second expressed in the units
bps (bits per second).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
Copyright © 2004–2007, Texas Instruments Incorporated
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
5秒后页面跳转
解析光耦仿真器：升级光耦合器技术的必要性
英伟达新一代Blackwell GPU过热问题致交付延迟
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
微信公众号
抖音公众号
浙公网安备 33010502006866号 浙ICP备10014259号-119
营业执照ICP证
数据手册
如果您发现信息不准确，
