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SN65220-Q1 PDF预览

SN65220-Q1

更新时间: 2024-09-15 04:31:23
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德州仪器 - TI 瞬态抑制器
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描述
USB PORT TRANSIENT SUPPRESSORS

SN65220-Q1 数据手册

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ꢒ ꢊꢓ ꢔꢂ  
www.ti.com  
SGLS297 − FEBRUARY 2005  
DBV  
(TOP VIEW)  
FEATURES  
D
Qualification in Accordance With  
AEC-Q100  
1
2
3
(1)  
6
5
4
A
NC  
D
Qualified for Automotive Applications  
GND  
NC  
GND  
B
D
Customer-Specific Configuration Control  
Can Be Supported Along With  
Major-Change Approval  
NC − No internal connection  
When read horizontally, pin 1 is the bottom left pin.  
D
D
Design to Protect Submicron 3-V or 5-V  
Circuits from Noise Transients  
Port ESD Protection Capability Exceeds:  
− 15-kV Human Body Model  
CURRENT vs VOLTAGE  
7.5  
− 2-kV Machine Model  
5
D
D
D
D
Available in a WCSP Chip-Scale Package  
Stand-Off Voltage . . . 6 V Min  
Low Current Leakage . . . 1 µA Max at 6 V  
Low Capacitance . . . 35 pF Typ  
2.5  
0
(1)  
Contact Texas Instruments for details. Q100 qualification data  
availableon request.  
−2.5  
−5  
−7.5  
−10  
APPLICATIONS  
D
USB 1.1 Host, Hub, or Peripheral Ports  
DESCRIPTION  
−10  
−5  
0
5
10  
15  
The SN65220 is a single transient voltage suppressor  
designed to provide electrical noise transient protection to  
universal serial bus (USB) 1.1 ports. Note that the input  
capacitance of the device makes it unsuitable for  
high-speed USB 2.0 applications.  
Voltage − V  
NOTE A: Typical current versus voltage curve was derived  
using the IEC 1.2/50-µs surge waveform.  
Any cabled I/O can be subjected to electrical noise  
transients from various sources. These noise transients  
can cause damage to the USB transceiver and/or the USB  
ASIC if they are of sufficient magnitude and duration.  
EQUIVALENT SCHEMATIC DIAGRAM  
A or C  
USB ports are typically implemented in 3-V or 5-V digital  
CMOS with limited ESD protection. The SN65220 can  
significantly increase the port ESD protection level and  
reduce the risk of damage to the circuits of the USB port.  
GND  
The IEC1000-4-2 ESD performance of the SN65220 is  
measured at the system level. Therefore, system design  
impacts the results of these tests. A high compliance level  
may be attained with proper board design and layout.  
B or D  
(One Suppressor Shown)  
NOTE All GND terminals should be connected to ground.  
:
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢋꢍ ꢌ ꢒꢉ ꢕ ꢎꢐ ꢌꢁ ꢒ ꢏꢎꢏ ꢖꢗ ꢘꢙ ꢚ ꢛꢜ ꢝꢖꢙꢗ ꢖꢞ ꢟꢠ ꢚ ꢚ ꢡꢗꢝ ꢜꢞ ꢙꢘ ꢢꢠꢣ ꢤꢖꢟ ꢜꢝꢖ ꢙꢗ ꢥꢜ ꢝꢡꢦ ꢋꢚ ꢙꢥꢠ ꢟꢝꢞ  
ꢟ ꢙꢗ ꢘꢙꢚ ꢛ ꢝꢙ ꢞ ꢢꢡ ꢟ ꢖ ꢘꢖ ꢟ ꢜ ꢝꢖ ꢙꢗꢞ ꢢ ꢡꢚ ꢝꢧꢡ ꢝꢡ ꢚ ꢛꢞ ꢙꢘ ꢎꢡꢨ ꢜꢞ ꢐꢗꢞ ꢝꢚ ꢠꢛ ꢡꢗꢝ ꢞ ꢞꢝ ꢜꢗꢥ ꢜꢚ ꢥ ꢩ ꢜꢚ ꢚ ꢜ ꢗꢝꢪꢦ  
ꢋꢚ ꢙ ꢥꢠꢟ ꢝ ꢖꢙ ꢗ ꢢꢚ ꢙ ꢟ ꢡ ꢞ ꢞ ꢖꢗ ꢫ ꢥꢙ ꢡ ꢞ ꢗꢙꢝ ꢗꢡ ꢟꢡ ꢞꢞ ꢜꢚ ꢖꢤ ꢪ ꢖꢗꢟ ꢤꢠꢥ ꢡ ꢝꢡ ꢞꢝꢖ ꢗꢫ ꢙꢘ ꢜꢤ ꢤ ꢢꢜ ꢚ ꢜꢛ ꢡꢝꢡ ꢚ ꢞꢦ  
Copyright 1997 − 2004, Texas Instruments Incorporated  

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