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SN55LVDS32_00 PDF预览

SN55LVDS32_00

更新时间: 2024-11-27 04:03:31
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HIGH-SPEED DIFFERENTIAL LINE RECEIVERS

SN55LVDS32_00 数据手册

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SN55LVDS32, SN65LVDS32, SN65LVDS3486, SN65LVDS9637  
HIGH-SPEED DIFFERENTIAL LINE RECEIVERS  
SLLS262H – JULY 1997 – REVISED MARCH 2000  
Meets or Exceeds the Requirements of  
ANSI TIA/EIA-644 Standard  
SN55LVDS32 . . . J OR W  
SN65LVDS32D  
(Marked as LVDS32 or 65LVDS32)  
(TOP VIEW)  
Operates with a Single 3.3-V Supply  
Designed for Signaling Rate of Up To  
400 Mbps  
1B  
1A  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
4B  
4A  
4Y  
G
Differential Input Thresholds ±100 mV Max  
1Y  
Typical Propagation Delay Time of 2.1 ns  
G
Power Dissipation 60 mW Typical per  
Receiver at 200 MHz  
2Y  
2A  
11 3Y  
10 3A  
2B  
Bus-Terminal ESD Protection Exceeds 8 kV  
GND  
9
3B  
Low-Voltage TTL (LVTTL) Logic Output  
Levels  
SN55LVDS32FK  
(TOP VIEW)  
Pin-Compatible with the AM26LS32,  
MC3486, and µA9637  
Open-Circuit Fail Safe  
3
4
2
1
20 19  
description  
1Y  
G
4A  
4Y  
NC  
G
18  
17  
16  
15  
14  
5
6
7
The  
SN55LVDS32,  
SN65LVDS32,  
NC  
2Y  
2A  
SN65LVDS3486, and SN65LVDS9637 are  
differential line receivers that implement the  
electricalcharacteristicsoflow-voltagedifferential  
signaling (LVDS). This signaling technique lowers  
the output voltage levels of 5-V differential  
standard levels (such as EIA/TIA-422B) to reduce  
the power, increase the switching speeds, and  
allow operation with a 3.3-V supply rail. Any of the  
four differential receivers provides a valid logical  
output state with a ±100 mV differential input  
voltage within the input common-mode voltage  
range. The input common-mode voltage range  
allows 1 V of ground potential difference between  
two LVDS nodes.  
3Y  
8
9
10 11 12 13  
SN65LVDS3486D (Marked as LVDS3486)  
(TOP VIEW)  
1B  
1A  
V
CC  
4B  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
1Y  
4A  
1,2EN  
2Y  
4Y  
3,4EN  
The intended application of these devices and  
signaling technique is both point-to-point and  
multidrop (one driver and multiple receivers) data  
transmission over controlled impedance media of  
approximately 100 . The transmission media  
may be printed-circuit board traces, backplanes,  
or cables. The ultimate rate and distance of data  
transfer is dependent upon the attenuation  
characteristics of the media and the noise  
coupling to the environment.  
2A  
11 3Y  
10 3A  
2B  
GND  
9
3B  
SN65LVDS9637D (Marked as DK637 or LVDS37)  
SN65LVDS9637DGN (Marked as L37)  
(TOP VIEW)  
V
1A  
1B  
2A  
2B  
1
2
3
4
8
7
6
5
CC  
1Y  
The SN65LVDS32, SN65LVDS3486, and  
SN65LVDS9637 are characterized for operation  
from 40°C to 85°C. The SN55LVDS32 is  
characterized for operation from 55°C to 125°C.  
2Y  
GND  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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