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SN54S114W-10 PDF预览

SN54S114W-10

更新时间: 2024-11-05 20:42:07
品牌 Logo 应用领域
德州仪器 - TI 输入元件输出元件逻辑集成电路触发器
页数 文件大小 规格书
8页 237K
描述
S SERIES, NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14

SN54S114W-10 技术参数

生命周期:Obsolete包装说明:DFP,
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.7其他特性:WITH INDIVIDUAL SET INPUTS
系列:SJESD-30 代码:R-GDFP-F14
长度:9.21 mm负载电容(CL):15 pF
逻辑集成电路类型:J-K FLIP-FLOP位数:2
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:COMPLEMENTARY封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DFP封装形状:RECTANGULAR
封装形式:FLATPACK最大电源电流(ICC):25 mA
传播延迟(tpd):7 ns认证状态:Not Qualified
座面最大高度:2.03 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:MILITARY端子形式:FLAT
端子节距:1.27 mm端子位置:DUAL
触发器类型:NEGATIVE EDGE宽度:6.29 mm
最小 fmax:80 MHzBase Number Matches:1

SN54S114W-10 数据手册

 浏览型号SN54S114W-10的Datasheet PDF文件第2页浏览型号SN54S114W-10的Datasheet PDF文件第3页浏览型号SN54S114W-10的Datasheet PDF文件第4页浏览型号SN54S114W-10的Datasheet PDF文件第5页浏览型号SN54S114W-10的Datasheet PDF文件第6页浏览型号SN54S114W-10的Datasheet PDF文件第7页 
SN54LS114A, SN54S114, SN74LS114A, SN74S114A  
DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS  
WITH PRESET, COMMON CLEAR, AND COMMON CLOCK  
SDLS010 – MARCH 1973 – REVISED MARCH 1988  
Copyright 1988, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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