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SN54LVTH16374WDR

更新时间： 2024-11-20 20:02:31
品牌 Logo 应用领域
德州仪器 - TI 驱动信息通信管理输出元件逻辑集成电路
页数 文件大小 规格书
18页 905K
描述
LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, CDFP48, 0.380 INCH, FINE PITCH, CERAMIC, FP-48

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SN54LVTH16374WDR 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP,针数：48
Reach Compliance Code：unknown风险等级：5.56
系列：LVTJESD-30 代码：R-GDFP-F48
长度：15.748 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER位数：8
功能数量：2端口数量：2
端子数量：48最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DFP封装形状：RECTANGULAR
封装形式：FLATPACK最大电源电流（ICC）：5 mA
传播延迟（tpd）：5 ns认证状态：Not Qualified
座面最大高度：3.05 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：BICMOS
温度等级：MILITARY端子形式：FLAT
端子节距：0.635 mm端子位置：DUAL
宽度：9.652 mmBase Number Matches：1

SN54LVTH16374WDR 数据手册

 浏览型号SN54LVTH16374WDR的Datasheet PDF文件第2页浏览型号SN54LVTH16374WDR的Datasheet PDF文件第3页浏览型号SN54LVTH16374WDR的Datasheet PDF文件第4页浏览型号SN54LVTH16374WDR的Datasheet PDF文件第5页浏览型号SN54LVTH16374WDR的Datasheet PDF文件第6页浏览型号SN54LVTH16374WDR的Datasheet PDF文件第7页 
SN54LVTH16374, SN74LVTH16374  
3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCBS145R–MAY 1992–REVISED AUGUST 2007  
1
FEATURES  
SN54LVTH16374 . . . WD PACKAGE  
SN74LVTH16374 . . . DGG OR DL PACKAGE  
(TOP VIEW)  
2
•
Members of the Texas Instruments Widebus™  
Family  
•
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Design for 3.3-V Operation  
and Low Static-Power Dissipation  
1
1OE  
1Q1  
1Q2  
GND  
1Q3  
1Q4  
VCC  
1Q5  
1Q6  
GND  
1Q7  
1Q8  
2Q1  
2Q2  
GND  
2Q3  
2Q4  
VCC  
2Q5  
2Q6  
GND  
2Q7  
2Q8  
2OE  
1CLK  
1D1  
48  
47  
2
3
46 1D2  
•
•
•
Support Mixed-Mode Signal Operation (5-V  
4
GND  
1D3  
1D4  
VCC  
45  
44  
43  
42  
Input and Output Voltages With 3.3-V VCC  
)
5
Support Unregulated Battery Operation Down  
to 2.7 V  
6
7
Typical VOLP (Output Ground Bounce) <0.8 V at  
VCC = 3.3 V, TA = 25°C  
8
41 1D5  
40 1D6  
39 GND  
9
•
•
Ioff and Power-Up 3-State Support Hot Insertion  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Bus Hold on Data Inputs Eliminates the Need  
for External Pullup/Pulldown Resistors  
1D7  
1D8  
2D1  
38  
37  
36  
•
•
•
•
Distributed VCC and GND Pins Minimize  
High-Speed Switching Noise  
35 2D2  
34 GND  
33 2D3  
32 2D4  
Flow-Through Architecture Optimizes PCB  
Layout  
Latch-Up Performance Exceeds 500 mA Per  
JESD 17  
VCC  
31  
30 2D5  
29 2D6  
28 GND  
27 2D7  
26 2D8  
25 2CLK  
ESD Protection Exceeds JESD 22  
–
–
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
DESCRIPTION/ORDERING INFORMATION  
The 'LVTH16374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed for low-voltage  
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. These  
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working  
registers.  
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock  
(CLK), the Q outputs of the flip-flop take on the logic levels set up at the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or  
low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the  
bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines  
without need for interface or pullup components.  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors  
with the bus-hold circuitry is not recommended.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
Widebus is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1992–2007, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are  
tested unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
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