Datasheet > 逻辑 > 总线驱动器/收发器> SN54LVC646A-SP

SN54LVC646A-SP

更新时间： 2024-09-29 12:22:35

品牌	Logo	应用领域
德州仪器 - TI		总线收发器输出元件
页数	文件大小	规格书
10页	159K
描述
RAD-TOLERANT CLASS V OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

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SN54LVC646A-SP 数据手册

SN54LVC646A-SP

www.ti.com ............................................................................................................................................................................................. SCAS865–OCTOBER 2008

RAD-TOLERANT CLASS V OCTAL BUS TRANSCEIVER AND REGISTER

WITH 3-STATE OUTPUTS

FEATURES

W PACKAGE

(TOP VIEW)

•

Operates From 1.65 V to 3.6 V

Inputs Accept Voltages to 5.5 V

Max t_pdof 7.4 ns at 3.3 V

CLKAB

SAB

DIR

V_CC

CLKBA

Typical V_OLP(Output Ground Bounce)

<0.8 at V_CC= 3.3 V, T_A= 25°C

22 SBA

•

Typical V_OHV(Output V_OHUndershoot)

>2 V at V_CC= 3.3 V, T_A= 25°C

Supports Mixed-Mode Signal Operation on All

Ports (5-V Input/Output Voltage With

17 B4

16 B5

15 B6

3.3-V V_CC

)

A7 10

•

I_offSupports Partial Power-Down-Mode

Operation

GND

Latch-Up Performance Exceeds 250 mA Per

JESD 17

ESD Protection Exceeds JESD 22

–

2000-V Human-Body Model (A114-A)

200-V Machine Model (A115-A)

1000-V Charged-Device Model (C101)

(1)

•

Rad Tolerant: 50kRad (Si) TID

TID Dose Rate 0.10 rad/s

QML-V Qualified, SMD 5962-97626

–

(1) Radiation tolerance is a typical value based upon initial device

qualification. Radiation Lot Acceptance Testing is available –

contact factory for details.

DESCRIPTION/ORDERING INFORMATION

The SN54LVC646A octal bus transceiver and register is designed for 2.7-V to 3.6-V V_CCoperation.

This device consists of bus-transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed

transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked

into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 shows

the four fundamental bus-management functions that are performed with the SN54LVC646A device.

ORDERING INFORMATION

T_A

PACKAGE⁽¹⁾⁽²⁾

ORDERABLE PART NUMBER

TOP-SIDE MARKING

5962-9762601VKA

–55°C to 125°C

CFP – W

Tube of 85

5962-9762601VKA

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com.

(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...10

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与SN54LVC646A-SP相关器件

型号	品牌	获取价格	描述	数据表
SN54LVC652A	TI	获取价格	OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVC652A_15	TI	获取价格	OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVC652AFK	TI	获取价格	OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
SN54LVC74	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54LVC74A	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54LVC74A_07	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54LVC74A_10	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54LVC74AFK	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54LVC74AJ	TI	获取价格	DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
SN54LVC74A-SP	TI	获取价格	具有清零和预置端的双路正边沿触发式 D 型触发器

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