5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 总线驱动器/收发器> SN54LVC541AW
SN54LVC541AW PDF预览

SN54LVC541AW

更新时间： 2024-11-03 23:03:07
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
9页 126K
描述
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

阅读下载

中文翻译

获取价格

SN54LVC541AW 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：CERAMIC, DFP-20针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.56Is Samacsys：N
其他特性：WITH DUAL OUTPUT ENABLE系列：LVC/LCX/Z
JESD-30 代码：R-GDFP-F20长度：13.09 mm
负载电容（CL）：50 pF逻辑集成电路类型：BUS DRIVER
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装形状：RECTANGULAR封装形式：FLATPACK
传播延迟（tpd）：5.6 ns认证状态：Not Qualified
座面最大高度：2.54 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：2.7 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
宽度：6.92 mmBase Number Matches：1

SN54LVC541AW 数据手册

 浏览型号SN54LVC541AW的Datasheet PDF文件第2页浏览型号SN54LVC541AW的Datasheet PDF文件第3页浏览型号SN54LVC541AW的Datasheet PDF文件第4页浏览型号SN54LVC541AW的Datasheet PDF文件第5页浏览型号SN54LVC541AW的Datasheet PDF文件第6页浏览型号SN54LVC541AW的Datasheet PDF文件第7页 
SN54LVC541A, SN74LVC541A  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCAS298H – JANUARY 1993 – REVISED JUNE 1998  
SN54LVC541A . . . J OR W PACKAGE  
SN74LVC541A . . . DB, DW, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
OE1  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
V
CC  
OE2  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
= 3.3 V, T = 25°C  
Y1  
Y2  
Y3  
Y4  
A
Power Off Disables Outputs, Permitting  
Live Insertion  
Supports Mixed-Mode Signal Operation on  
All Ports (5-V Input/Output Voltage With  
Y5  
13 Y6  
12 Y7  
11 Y8  
3.3-V V  
)
CC  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
GND 10  
SN54LVC541A . . . FK PACKAGE  
(TOP VIEW)  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Package Options Include Plastic  
Small-Outline (DW), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW), and  
Ceramic Flat (W) Packages, Ceramic Chip  
Carriers (FK), and DIPs (J)  
3
2
1 20 19  
18  
Y1  
Y2  
Y3  
Y4  
Y5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
17  
16  
15  
14  
description  
9 10 11 12 13  
TheSN54LVC541Aoctalbuffer/driverisdesigned  
for 2.7-V to 3.6-V V operation and the  
CC  
SN74LVC541A octal buffer/driver is designed for  
1.65-V to 3.6-V V operation.  
CC  
The ’LVC541A devices are ideal for driving bus  
lines or buffering memory address registers.  
These devices feature inputs and outputs on opposite sides of the package to facilitate printed circuit board  
layout.  
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output enable (OE1 or OE2)  
input is high, all eight outputs are in the high-impedance state.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
The SN54LVC541A is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74LVC541A is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
On products compliant to MIL-PRF-38535, all parameters are tested  
unless otherwise noted. On all other products, production  
processing does not necessarily include testing of all parameters.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...9

中文翻译

下载PDF

与SN54LVC541AW相关器件

型号 品牌 获取价格 描述 数据表
SN54LVC573A TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54LVC573A_10 TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54LVC573AFK TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54LVC573AFKR TI

获取价格

 		LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, CQCC20
SN54LVC573AJ TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54LVC573AW TI

获取价格

 		OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SN54LVC573AWR TI

获取价格

 		LVC/LCX/Z SERIES, 8-BIT DRIVER, TRUE OUTPUT, CDFP20, CERAMIC, FP-20
SN54LVC574 TI

获取价格

 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54LVC574A TI

获取价格

 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54LVC574A_10 TI

获取价格

 		OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

与SN54LVC541AW相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证