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SN54LV08AJ PDF预览

SN54LV08AJ

更新时间: 2024-11-25 13:13:47
品牌 Logo 应用领域
德州仪器 - TI 输入元件
页数 文件大小 规格书
7页 132K
描述
LV/LV-A/LVX/H SERIES, QUAD 2-INPUT AND GATE, CDIP14, CERAMIC, DIP-14

SN54LV08AJ 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84系列:LV/LV-A/LVX/H
JESD-30 代码:R-GDIP-T14长度:19.56 mm
逻辑集成电路类型:AND GATE功能数量:4
输入次数:2端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):21 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):2.5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

SN54LV08AJ 数据手册

 浏览型号SN54LV08AJ的Datasheet PDF文件第2页浏览型号SN54LV08AJ的Datasheet PDF文件第3页浏览型号SN54LV08AJ的Datasheet PDF文件第4页浏览型号SN54LV08AJ的Datasheet PDF文件第5页浏览型号SN54LV08AJ的Datasheet PDF文件第6页浏览型号SN54LV08AJ的Datasheet PDF文件第7页 
SN54LV08, SN74LV08  
QUADRUPLE 2-INPUT POSITIVE-AND GATES  
SCLS186C – FEBRUARY 1993 – REVISED APRIL 1996  
SN54LV08 . . . J OR W PACKAGE  
SN74LV08 . . . D, DB, OR PW PACKAGE  
(TOP VIEW)  
EPIC (Enhanced-Performance Implanted  
CMOS) 2-µ Process  
Typical V  
< 0.8 V at V , T = 25°C  
(Output Ground Bounce)  
OLP  
CC  
A
1A  
1B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
Typical V  
> 2 V at V , T = 25°C  
(Output V  
Undershoot)  
4B  
4A  
4Y  
OHV  
CC  
OH  
1Y  
A
2A  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model  
(C = 200 pF, R = 0)  
2B  
10 3B  
9
8
2Y  
3A  
3Y  
GND  
Latch-Up Performance Exceeds 250 mA  
Per JEDEC Standard JESD-17  
SN54LV08 . . . FK PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), Thin Shrink Small-Outline (PW), and  
Ceramic Flat (W) Packages, Ceramic Chip  
Carriers (FK), and Ceramic (J) 300-mil DIPs  
3
2
1
20 19  
18  
4A  
NC  
4Y  
1Y  
NC  
2A  
4
5
6
7
8
17  
16  
description  
15 NC  
14  
9 10 11 12 13  
NC  
2B  
These quadruple 2-input positive-AND gates are  
designed for 2.7-V to 5.5-V V operation.  
3B  
CC  
The ’LV08 perform Boolean function Y = A B or  
Y = in positive logic.  
A
B
NC – No internal connection  
The SN74LV08 is available in TI’s shrink  
small-outline package (DB), which provides the  
same I/O pin count and functionality of standard  
small-outline packages in less than half the  
printed-circuit-board area.  
The SN54LV08 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74LV08 is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
(each gate)  
INPUTS  
OUTPUT  
Y
A
B
H
X
L
H
L
H
L
L
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1996, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN54LV08AJ 替代型号

型号 品牌 替代类型 描述 数据表
SN54LV08J TI

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