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SN54LV04AW PDF预览

SN54LV04AW

更新时间： 2024-10-31 22:59:15
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
12页 307K
描述
HEX INVERTERS

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SN54LV04AW 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP,针数：14
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84系列：LV/LV-A/LVX/H
JESD-30 代码：R-GDFP-F14长度：9.21 mm
逻辑集成电路类型：INVERTER功能数量：6
输入次数：1端子数量：14
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DFP
封装形状：RECTANGULAR封装形式：FLATPACK
传播延迟（tpd）：18 ns认证状态：Not Qualified
座面最大高度：2.03 mm最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：2 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
宽度：6.29 mmBase Number Matches：1

SN54LV04AW 数据手册

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SN54LV04A, SN74LV04A  
HEX INVERTERS  
SCLS388H – SEPTEMBER 1997 – REVISED JULY 2003  
2-V to 5.5-V V  
Operation  
Support Mixed-Mode Voltage Operation on  
All Ports  
CC  
Max t of 6.5 ns at 5 V  
pd  
I
Supports Partial-Power-Down Mode  
off  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
Operation  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
OLP  
CC  
= 3.3 V, T = 25°C  
A
Typical V  
>2.3 V at V  
(Output V  
Undershoot)  
OHV  
OH  
– 1000-V Charged-Device Model (C101)  
= 3.3 V, T = 25°C  
CC  
A
SN54LV04A . . . J OR W PACKAGE  
SN74LV04A . . . D, DB, DGV, NS,  
OR PW PACKAGE  
SN74LV04A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LV04A . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
3
2
1 20 19  
18  
1
14  
1A  
1Y  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
6Y  
NC  
5A  
2A  
NC  
2Y  
4
5
6
7
8
1Y  
2A  
2Y  
3A  
3Y  
13 6A  
12 6Y  
2
3
4
5
6
6A  
6Y  
5A  
17  
16  
2A  
11  
10  
9
5A  
5Y  
4A  
2Y  
15 NC  
14  
9 10 11 12 13  
NC  
3A  
3A  
10 5Y  
5Y  
9
8
3Y  
4A  
4Y  
7
8
GND  
NC – No internal connection  
description/ordering information  
These hex inverters are designed for 2-V to 5.5-V V  
inverters. These devices perform the Boolean function Y = A.  
operation. The ’LV04A devices contain six independent  
CC  
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the  
off  
off  
outputs, preventing damaging current backflow through the devices when they are powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
QFN – RGY  
SOIC – D  
Reel of 1000  
Tube of 50  
SN74LV04ARGYR  
SN74LV04AD  
LV04A  
LV04A  
Reel of 2500  
Reel of 2000  
Reel of 2000  
Tube of 90  
SN74LV04ADR  
SN74LV04ANSR  
SN74LV04ADBR  
SN74LV04APW  
SN74LV04APWR  
SN74LV04APWT  
SN74LV04ADGVR  
SNJ54LV04AJ  
SOP – NS  
74LV04A  
LV04A  
–40°C to 85°C  
SSOP – DB  
TSSOP – PW  
Reel of 2000  
Reel of 250  
Reel of 2000  
Tube of 25  
LV04A  
TVSOP – DGV  
CDIP – J  
LV04A  
SNJ54LV04AJ  
SNJ54LV04AW  
SNJ54LV04AFK  
–55°C to 125°C  
CFP – W  
Tube of 150  
Tube of 55  
SNJ54LV04AW  
SNJ54LV04AFK  
LCCC – FK  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design  
guidelines are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2003, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...12

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