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ꢉꢊꢋ ꢌꢁ ꢅꢊ ꢍ ꢎꢊ ꢍꢀ
SCLS184C − FEBRUARY 1993 − REVISED APRIL 1996
SN54LV04 . . . J OR W PACKAGE
SN74LV04 . . . D, DB, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
EPIC (Enhanced-Performance Implanted
CMOS) 2-µ Process
Typical V
(Output Ground Bounce)
OLP
< 0.8 V at V , T = 25°C
CC
A
1A
1Y
V
CC
1
2
3
4
5
6
7
14
13
12
11
Typical V
(Output V
Undershoot)
6A
6Y
5A
OHV
OH
> 2 V at V , T = 25°C
CC
A
2A
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
2Y
3A
10 5Y
9
8
3Y
4A
4Y
GND
D
D
Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
SN54LV04 . . . FK PACKAGE
(TOP VIEW)
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Ceramic Flat (W) Packages, Ceramic Chip
Carriers (FK), and Ceramic (J) 300-mil DIPs
3
2
1
20 19
18
6Y
NC
5A
2A
NC
2Y
4
5
6
7
8
17
16
description
15 NC
14
9 10 11 12 13
NC
3A
These hex inverters are designed for 2.7-V to
5.5-V V operation.
5Y
CC
The ’LV04 contain six independent inverters.
These devices perform the Boolean function
Y = A.
NC − No internal connection
The SN74LV04 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LV04 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74LV04 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
(each inverter)
INPUT
A
OUTPUT
Y
H
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1996, Texas Instruments Incorporated
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