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SN54LS191JD PDF预览

SN54LS191JD

更新时间: 2024-11-19 13:13:43
品牌 Logo 应用领域
摩托罗拉 - MOTOROLA 计数器逻辑集成电路
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10页 311K
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SN54LS191JD 数据手册

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SN54/74LS190  
SN54/74LS191  
PRESETTABLE BCD/DECADE  
UP/DOWN COUNTERS  
PRESETTABLE 4-BIT BINARY  
UP/DOWN COUNTERS  
PRESETTABLE BCD/DECADE  
UP/DOWN COUNTERS  
PRESETTABLE 4-BIT BINARY  
UP/DOWN COUNTERS  
The SN54/74LS190 is a synchronous UP/DOWN BCD Decade (8421)  
Counter and the SN54/74LS191 is a synchronous UP/DOWN Modulo-16  
Binary Counter. State changes of the counters are synchronous with the  
LOW-to-HIGH transition of the Clock Pulse input.  
LOW POWER SCHOTTKY  
An asynchronous Parallel Load (PL) input overrides counting and loads the  
data present on the P inputs into the flip-flops, which makes it possible to use  
n
the circuits as programmable counters. A Count Enable (CE) input serves as  
the carry/borrow input in multi-stage counters. An Up/Down Count Control  
(U/D) input determines whether a circuit counts up or down. A Terminal Count  
(TC) output and a Ripple Clock (RC) output provide overflow/underflow  
indication and make possible a variety of methods for generating  
carry/borrow signals in multistage counter applications.  
J SUFFIX  
CERAMIC  
CASE 620-09  
16  
1
Low Power . . . 90 mW Typical Dissipation  
High Speed . . . 25 MHz Typical Count Frequency  
Synchronous Counting  
N SUFFIX  
PLASTIC  
Asynchronous Parallel Load  
Individual Preset Inputs  
CASE 648-08  
16  
1
Count Enable and Up/Down Control Inputs  
Cascadable  
Input Clamp Diodes Limit High Speed Termination Effects  
D SUFFIX  
SOIC  
CASE 751B-03  
16  
1
CONNECTION DIAGRAM DIP (TOP VIEW)  
ORDERING INFORMATION  
SN54LSXXXJ  
SN74LSXXXN Plastic  
SN74LSXXXD SOIC  
Ceramic  
NOTE:  
The Flatpak version  
has the same pinouts  
(Connection Diagram) as  
the Dual In-Line Package.  
LOGIC SYMBOL  
PIN NAMES  
LOADING (Note a)  
HIGH  
LOW  
CE  
CP  
U/D  
PL  
Count Enable (Active LOW) Input  
1.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
0.5 U.L.  
10 U.L.  
10 U.L.  
10 U.L.  
0.7 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
0.25 U.L.  
5 (2.5) U.L.  
5 (2.5) U.L.  
5 (2.5) U.L.  
Clock Pulse (Active HIGH going edge) Input  
Up/Down Count Control Input  
Parallel Load Control (Active LOW) Input  
Parallel Data Inputs  
Flip-Flop Outputs (Note b)  
Ripple Clock Output (Note b)  
Terminal Count Output (Note b)  
P
Q
RC  
n
n
TC  
NOTES:  
a. 1 TTL Unit Load (U.L.) = 40 µA HIGH/1.6 mA LOW.  
b. The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)  
b. Temperature Ranges.  
FAST AND LS TTL DATA  
5-341  

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