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SN54HCT652W PDF预览

SN54HCT652W

更新时间： 2024-09-15 23:03:03
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
8页 154K
描述
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

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SN54HCT652W 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP,针数：24
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84其他特性：WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列：HCTJESD-30 代码：R-GDFP-F24
长度：14.36 mm负载电容（CL）：150 pF
逻辑集成电路类型：REGISTERED BUS TRANSCEIVER位数：8
功能数量：1端口数量：2
端子数量：24最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DFP封装形状：RECTANGULAR
封装形式：FLATPACK传播延迟（tpd）：80 ns
认证状态：Not Qualified座面最大高度：2.29 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL宽度：9.09 mm
Base Number Matches：1

SN54HCT652W 数据手册

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SN54HCT652, SN74HCT652  
OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCLS179B – MARCH 1984 – REVISED MAY 1997  
SN54HCT652 . . . JT OR W PACKAGE  
SN74HCT652 . . . DW OR NT PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Independent Registers and Enables for A  
and B Buses  
Multiplexed Real-Time and Stored Data  
True Data Paths  
CLKAB  
SAB  
OEAB  
A1  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
CLKBA  
SBA  
OEBA  
B1  
2
3
High-Current 3-State Outputs Can Drive up  
to 15 LSTTL Loads  
4
A2  
5
Package Options Include Plastic  
Small-Outline (DW) and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (NT) and Ceramic (JT)  
300-mil DIPs  
A3  
B2  
6
A4  
B3  
7
A5  
B4  
8
A6  
B5  
9
A7  
B6  
10  
11  
A8  
B7  
description  
GND 12  
13 B8  
The ’HCT652 consist of bus-transceiver circuits,  
D-type flip-flops, and control circuitry arranged for  
multiplexed transmission of data directly from the  
data bus or from the internal storage registers.  
Output-enable (OEAB and OEBA) inputs are  
provided to control the transceiver functions.  
Select-control (SAB and SBA) inputs are provided  
to select real-time or stored data transfer. A low  
inputlevelselectsreal-timedata;ahighinputlevel  
selects stored data. Figure 1 illustrates the four  
fundamental bus-management functions that can  
be performed with the ’HCT652.  
SN54HCT652 . . . FK PACKAGE  
(TOP VIEW)  
4
3
2 1 28 27 26  
5
6
7
8
9
25 OEBA  
A1  
A2  
A3  
NC  
A4  
A5  
A6  
24  
23  
22  
21  
20  
19  
B1  
B2  
NC  
B3  
B4  
B5  
Data on the A or B data bus, or both, can be stored  
in the internal D-type flip-flops by low-to-high  
transitions at the appropriate clock (CLKAB or  
CLKBA) terminals regardless of the select- or  
output-control terminals. When SAB and SBA are  
in the real-time transfer mode, it is possible to  
store data without using the internal D-type  
flip-flops by simultaneously enabling OEAB and  
OEBA. In this configuration, each output  
reinforces its input. When all other data sources to  
the two sets of bus lines are at high impedance,  
each set of bus lines remains at its last state.  
10  
11  
12 13 14 15 16 17 18  
NC – No internal connection  
The SN54HCT652 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74HCT652 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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