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SN54HCT646FK PDF预览

SN54HCT646FK

更新时间： 2024-10-31 22:15:27
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
8页 156K
描述
OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

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中文翻译

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SN54HCT646FK 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QLCC包装说明：QCCN, LCC28,.45SQ
针数：28Reach Compliance Code：not_compliant
HTS代码：8542.39.00.01风险等级：5.82
其他特性：WITH DIRECTION CONTROL控制类型：INDEPENDENT CONTROL
计数方向：BIDIRECTIONAL系列：HCT
JESD-30 代码：S-CQCC-N28长度：11.43 mm
负载电容（CL）：150 pF逻辑集成电路类型：REGISTERED BUS TRANSCEIVER
最大I（ol）：0.006 A位数：8
功能数量：1端口数量：2
端子数量：28最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：QCCN封装等效代码：LCC28,.45SQ
封装形状：SQUARE封装形式：CHIP CARRIER
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
传播延迟（tpd）：80 ns认证状态：Not Qualified
座面最大高度：2.03 mm子类别：Bus Driver/Transceivers
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：4.5 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子形式：NO LEAD端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
翻译：N/A触发器类型：POSITIVE EDGE
宽度：11.43 mmBase Number Matches：1

SN54HCT646FK 数据手册

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SN54HCT646, SN74HCT646  
OCTAL BUS TRANSCEIVERS AND REGISTERS  
WITH 3-STATE OUTPUTS  
SCLS178B – MARCH 1984 – REVISED MAY 1997  
SN54HCT646 . . . JT OR W PACKAGE  
SN74HCT646 . . . DW OR NT PACKAGE  
(TOP VIEW)  
Inputs Are TTL-Voltage Compatible  
Independent Registers for A and B Buses  
Multiplexed Real-Time and Stored Data  
True Data Paths  
CLKAB  
SAB  
DIR  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
A8  
GND  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
CLKBA  
SBA  
OE  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
2
High-Current 3-State Outputs Can Drive up  
to 15 LSTTL Loads  
3
4
Package Options Include Plastic  
Small-Outline (DW) and Ceramic Flat (W)  
Packages, Ceramic Chip Carriers (FK), and  
Standard Plastic (NT) and Ceramic (JT)  
300-mil DIPs  
5
6
7
8
9
10  
11  
12  
description  
B8  
The ’HCT646 consist of bus-transceiver circuits  
with 3-state outputs, D-type flip-flops, and control  
circuitry arranged for multiplexed transmission of  
data directly from the input bus or from the internal  
registers. DataontheAorBbusisclockedintothe  
registers on the low-to-high transition of the  
appropriate clock (CLKAB or CLKBA) input.  
Figure 1 illustrates the four fundamental bus-  
management functions that can be performed  
with the ’HCT646.  
SN54HCT646 . . . FK PACKAGE  
(TOP VIEW)  
4
3
2
1
28 27 26  
25  
A1  
A2  
A3  
NC  
A4  
OE  
B1  
B2  
NC  
B3  
B4  
B5  
5
6
7
8
9
24  
23  
22  
21  
20  
19  
Output-enable (OE) and direction-control (DIR)  
inputs control the transceiver functions. In the  
transceiver mode, data present at the  
high-impedance port can be stored in either or  
both registers.  
A5 10  
11  
A6  
12 13 14 15 16 17 18  
The select-control (SAB and SBA) inputs can  
multiplex stored and real-time (transparent mode)  
data. DIR determines which bus receives data  
when OE is active (low). In the isolation mode (OE  
high), A data can be stored in one register and/or  
B data can be stored in the other register.  
NC – No internal connection  
When an output function is disabled, the input function is still enabled and can be used to store and transmit  
data. Only one of the two buses, A or B, can be driven at a time.  
The SN54HCT646 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74HCT646 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1997, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345678

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