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SN54HCT126 PDF预览

SN54HCT126

更新时间: 2024-11-25 23:03:03
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描述
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

SN54HCT126 数据手册

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SN54HCT126, SN74HCT126  
QUADRUPLE BUS BUFFER GATES  
WITH 3-STATE OUTPUTS  
SCLS070A – NOVEMBER 1988 – REVISED NOVEMBER 1990  
SN54HCT126 . . . J PACKAGE  
SN74HCT126 . . . D OR N PACKAGE  
(TOP VIEW)  
High-Current 3-State Outputs Drive Bus  
Lines or Buffer Memory Address Registers  
Inputs Are TTL-Voltage Compatible  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1OE  
1A  
V
CC  
4OE  
4A  
1
2
3
4
5
6
7
14  
13  
12  
11  
1Y  
2OE  
2A  
4Y  
10 3OE  
description  
9
8
2Y  
3A  
3Y  
GND  
These bus buffers feature independent line  
drivers with 3-state outputs. Each output is  
disabled when the associated OE is low.  
SN54HCT126 . . . FK PACKAGE  
(TOP VIEW)  
The SN54HCT126 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74HCT126 is characterized for  
operation from –40°C to 85°C.  
3
2
1
20 19  
18  
4A  
NC  
4Y  
1Y  
NC  
4
5
6
7
8
17  
16  
FUNCTION TABLE  
2OE  
NC  
INPUTS  
OUTPUT  
Y
15 NC  
14  
9 10 11 12 13  
OE  
A
H
L
3OE  
2A  
H
H
L
H
L
X
Z
H = high level, L = low level,  
X = irrelevant  
NC – No internal connection  
logic symbol  
logic diagram, each buffer (positive logic)  
1
OE  
1OE  
3
6
EN  
1Y  
2Y  
3Y  
4Y  
2
1A  
4
A
Y
2OE  
5
2A  
10  
8
3OE  
9
3A  
13  
4OE  
11  
12  
4A  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
Copyright 1990, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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