SN54HCT125W

更新时间： 2024-11-22 23:03:03

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
5页	98K
描述
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

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数据手册

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SN54HCT125W 数据手册

SN54HCT125, SN74HCT125

QUADRUPLE BUS BUFFER GATES

WITH 3-STATE OUTPUTS

SCLS069C – NOVEMBER 1988 – REVISED MAY 1997

SN54HCT125 . . . J OR W PACKAGE

SN74HCT125 . . . D OR N PACKAGE

(TOP VIEW)

Inputs Are TTL-Voltage Compatible

High-Current 3-State Outputs Drive Bus

Lines or Buffer Memory Address Registers

Package Options Include Plastic

Small-Outline (D) and Ceramic Flat (W)

Packages, Ceramic Chip Carriers (FK), and

Standard Plastic (N) and Ceramic (J)

300-mil DIPs

1OE

2OE

4OE

3OE

description

GND

These bus buffer gates feature independent line

drivers with 3-state outputs. Each output is

disasbled when the associated output-enable

(OE) input is high.

SN54HCT125 . . . FK PACKAGE

(TOP VIEW)

The SN54HCT125 is characterized for operation

over the full military temperature range of –55°C

to 125°C. The SN74HCT125 is characterized for

operation from –40°C to 85°C.

20 19

2OE

15 NC

9 10 11 12 13

FUNCTION TABLE

(each gate)

3OE

INPUTS

OUTPUT

NC – No internal connection

†

logic symbol

1OE

2OE

3OE

4OE

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, N, and W packages.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5

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与SN54HCT125W相关器件

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