SN54HCT00W

更新时间： 2024-11-03 23:03:03

品牌	Logo	应用领域
德州仪器 - TI		输入元件
页数	文件大小	规格书
4页	80K
描述
QUADRUPLE 2-INPUT POSITIVE-NAND GATES

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SN54HCT00W 数据手册

SN54HCT00, SN74HCT00

QUADRUPLE 2-INPUT POSITIVE-NAND GATES

SCLS062B – NOVEMBER 1988 – REVISED MAY 1997

SN54HCT00 . . . J OR W PACKAGE

SN74HCT00 . . . D, N, OR PW PACKAGE

(TOP VIEW)

Inputs Are TTL-Voltage Compatible

Package Options Include Plastic

Small-Outline (D), Thin Shrink

Small-Outline (PW), and Ceramic Flat (W)

Packages, Ceramic Chip Carriers (FK), and

Standard Plastic (N) and Ceramic (J)

300-mil DIPs

10 3B

description

These devices contain four independent 2-input

NAND gates. They perform the Boolean function

Y = A • B or Y = A + B in positive logic.

GND

SN54HCT00 . . . FK PACKAGE

(TOP VIEW)

The SN54HCT00 is characterized for operation

over the full military temperature range of –55°C

to 125°C. The SN74HCT00 is characterized for

operation from –40°C to 85°C.

20 19

FUNCTION TABLE

(each gate)

INPUTS

15 NC

9 10 11 12 13

OUTPUT

NC – No internal connection

†

logic symbol

†

This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

Pin numbers shown are for the D, J, N, PW, and W packages.

logic diagram (positive logic)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

UNLESS OTHERWISE NOTED this document contains PRODUCTION

DATA information current as of publication date. Products conform to

specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all

parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4

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