SN54HC259W

更新时间： 2024-01-13 08:05:59

品牌	Logo	应用领域
德州仪器 - TI		锁存器双倍数据速率
页数	文件大小	规格书
9页	137K
描述
8-BIT ADDRESSABLE LATCHES

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技术参数
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SN54HC259W 技术参数

生命周期：	Obsolete	零件包装代码：	QLCC
包装说明：	QCCN,	针数：	20
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.62	其他特性：	1:8 DMUX FOLLOWED BY LATCH; RESET ACTIVE ONLY WHEN LATCH ENABLE IS HIGH
系列：	HC/UH	JESD-30 代码：	S-CQCC-N20
长度：	8.89 mm	负载电容（CL）：	50 pF
逻辑集成电路类型：	D LATCH	位数：	1
功能数量：	1	端子数量：	20
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出极性：	TRUE	封装主体材料：	CERAMIC, METAL-SEALED COFIRED
封装代码：	QCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER	传播延迟（tpd）：	195 ns
认证状态：	Not Qualified	座面最大高度：	2.03 mm
最大供电电压 (Vsup)：	6 V	最小供电电压 (Vsup)：	2 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	MILITARY
端子形式：	NO LEAD	端子节距：	1.27 mm
端子位置：	QUAD	触发器类型：	LOW LEVEL
宽度：	8.89 mm	Base Number Matches：	1

SN54HC259W 数据手册

SN54HC259, SN74HC259

8-BIT ADDRESSABLE LATCHES

SCLS134B – DECEMBER 1982 – REVISED MAY 1997

SN54HC259 . . . J OR W PACKAGE

SN74HC259 . . . D, N, OR PW PACKAGE

(TOP VIEW)

8-Bit Parallel-Out Storage Register

Performs Serial-to-Parallel Conversion With

Storage

Asynchronous Parallel Clear

Active-High Decoder

GND

CLR

Enable Input Simplifies Expansion

Expandable for n-Bit Applications

Four Distinct Functional Modes

Package Options Include Plastic

Small-Outline (D), Thin Shrink

Small-Outline (PW), and Ceramic Flat (W)

Packages, Ceramic Chip Carriers (FK), and

Standard Plastic (N) and Ceramic (J)

300-mil DIPs

SN54HC259 . . . FK PACKAGE

(TOP VIEW)

description

These 8-bit addressable latches are designed for

general-purpose storage applications in digital

systems. Specific uses include working registers,

serial-holding registers, and active-high decoders

or demultiplexers. They are multifunctional

devices capable of storing single-line data in eight

addressable latches, and being a 1-of-8 decoder

or demultiplexer with active-high outputs.

20 19

9 10 11 12 13

Four distinct modes of operation are selectable by

controlling the clear (CLR) and enable (G) inputs.

In the addressable-latch mode, data at the data-in

terminal is written into the addressed latch. The

addressed latch follows the data input with all

unaddressed latches remaining in their previous

states. In the memory mode, all latches remain in

their previous states and are unaffected by the

data or address inputs. To eliminate the possibility

of entering erroneous data in the latches, G

should be held high (inactive) while the address

lines are changing. In the 1-of-8 decoding or

demultiplexing mode, the addressed output

follows the level of the D input with all other

outputs low. In the clear mode, all outputs are low

and unaffected by the address and data inputs.

NC – No internal connection

The SN54HC259 is characterized for operation over the full military temperature range of –55°C to 125°C. The

SN74HC259 is characterized for operation from –40°C to 85°C.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

12 3 4 5 6 7...9

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与SN54HC259W相关器件

型号	品牌	获取价格	描述	数据表
SN54HC266	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES WITH OPEN-DRAIN OUTPUTS
SN54HC266_07	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES WITH OPEN-DRAIN OUTPUTS
SN54HC266FH	TI	获取价格	IC,LOGIC GATE,QUAD 2-INPUT XNOR,HC-CMOS,LLCC,20PIN,CERAMIC
SN54HC266FH	ROCHESTER	获取价格	XNOR Gate
SN54HC266FK	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES WITH OPEN-DRAIN OUTPUTS
SN54HC266FK-00	TI	获取价格	HC/UH SERIES, QUAD 2-INPUT XNOR GATE, CQCC20
SN54HC266J	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES WITH OPEN-DRAIN OUTPUTS
SN54HC266J-00	TI	获取价格	HC/UH SERIES, QUAD 2-INPUT XNOR GATE, CDIP14
SN54HC266W	TI	获取价格	QUADRUPLE 2-INPUT EXCLUSIVE-NOR GATES WITH OPEN-DRAIN OUTPUTS
SN54HC27	TI	获取价格	TRIPLE 3-INPUT POSITIVE-NOR GATES

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