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SN54HC126J PDF预览

SN54HC126J

更新时间: 2024-11-19 22:34:31
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件
页数 文件大小 规格书
6页 82K
描述
QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

SN54HC126J 技术参数

生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP14,.3针数:14
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.1Is Samacsys:N
控制类型:ENABLE HIGH系列:HC/UH
JESD-30 代码:R-GDIP-T14长度:19.56 mm
负载电容(CL):150 pF逻辑集成电路类型:BUS DRIVER
最大I(ol):0.006 A位数:1
功能数量:4端口数量:2
端子数量:14最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP14,.3
封装形状:RECTANGULAR封装形式:IN-LINE
包装方法:TUBE峰值回流温度(摄氏度):NOT SPECIFIED
电源:2/6 V最大电源电流(ICC):0.16 mA
Prop。Delay @ Nom-Sup:36 ns传播延迟(tpd):225 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):6 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.67 mm
Base Number Matches:1

SN54HC126J 数据手册

 浏览型号SN54HC126J的Datasheet PDF文件第2页浏览型号SN54HC126J的Datasheet PDF文件第3页浏览型号SN54HC126J的Datasheet PDF文件第4页浏览型号SN54HC126J的Datasheet PDF文件第5页浏览型号SN54HC126J的Datasheet PDF文件第6页 
SN54HC126, SN74HC126  
QUADRUPLE BUS BUFFER GATES  
WITH 3-STATE OUTPUTS  
SCLS103C – MARCH 1984 – REVISED FEBRUARY 1999  
SN54HC126 . . . J OR W PACKAGE  
SN74HC126 . . . D, DB, OR N PACKAGE  
(TOP VIEW)  
High-Current 3-State Outputs Interface  
Directly With System Bus or Can Drive up  
to 15 LSTTL Loads  
Package Options Include Plastic  
1OE  
1A  
V
CC  
4OE  
4A  
1
2
3
4
5
6
7
14  
13  
12  
11  
Small-Outline (D), Shrink Small-Outline  
(DB), and Ceramic Flat (W) Packages,  
Ceramic Chip Carriers (FK), and Standard  
Plastic (N) and Ceramic (J) DIPs  
1Y  
2OE  
2A  
4Y  
10 3OE  
2Y  
9
8
3A  
3Y  
description  
GND  
These quadruple bus buffer gates feature  
independent line drivers with 3-state outputs.  
Each output is disabled when the associated  
output-enable (OE) input is low.  
SN54HC126 . . . FK PACKAGE  
(TOP VIEW)  
The SN54HC126 is characterized for operation  
over the full military temperature range of –55°C  
to 125°C. The SN74HC126 is characterized for  
operation from –40°C to 85°C.  
3
2
1
20 19  
18  
4A  
NC  
4Y  
1Y  
NC  
4
5
6
7
8
17  
16  
2OE  
NC  
FUNCTION TABLE  
(each buffer)  
15 NC  
14  
9 10 11 12 13  
3OE  
2A  
INPUTS  
OUTPUT  
Y
OE  
A
H
L
H
H
L
H
L
NC – No internal connection  
X
Z
logic symbol  
1
1OE  
EN  
3
1Y  
2
1A  
4
6
2OE  
5
2Y  
2A  
10  
8
3OE  
3A  
3Y  
9
13  
12  
4OE  
11  
4Y  
4A  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
Pin numbers shown are for the D, DB, J, N, and W packages.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

SN54HC126J 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC126EE4 TI

完全替代

High-Speed CMOS Logic Quad Buffer, Three-State
CD74HC126E TI

完全替代

High Speed CMOS Logic Quad Buffer, Three-State
CD54HC126F3A TI

完全替代

High-Speed CMOS Logic Quad Buffer, Three-State

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4 通道、2 输入、2V 至 6V 与非门 | TD | 0 | 25 to 25