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SN54BCT574N PDF预览

SN54BCT574N

更新时间: 2024-11-27 13:13:47
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
5页 76K
描述
BCT/FBT SERIES, 8-BIT DRIVER, TRUE OUTPUT, PDIP20, 0.300 INCH, PLASTIC, DIP-20

SN54BCT574N 技术参数

生命周期:Obsolete零件包装代码:DIP
包装说明:DIP,针数:20
Reach Compliance Code:unknown风险等级:5.34
系列:BCT/FBTJESD-30 代码:R-PDIP-T20
长度:24.325 mm逻辑集成电路类型:BUS DRIVER
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装形状:RECTANGULAR封装形式:IN-LINE
传播延迟(tpd):11.2 ns认证状态:Not Qualified
座面最大高度:5.08 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
宽度:7.62 mmBase Number Matches:1

SN54BCT574N 数据手册

 浏览型号SN54BCT574N的Datasheet PDF文件第2页浏览型号SN54BCT574N的Datasheet PDF文件第3页浏览型号SN54BCT574N的Datasheet PDF文件第4页浏览型号SN54BCT574N的Datasheet PDF文件第5页 
SN54BCT574, SN74BCT574  
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCBS074B – SEPTEMBER 1991 – REVISED NOVEMBER 1993  
SN54BCT574 . . . J OR W PACKAGE  
SN74BCT574 . . . DW OR N PACKAGE  
(TOP VIEW)  
State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
CLK  
Full Parallel Access for Loading  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK) and Flatpacks (W), and  
Plastic and Ceramic 300-mil DIPs (J, N)  
description  
GND  
These 8-bit flip-flops feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
SN54BCT574 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
4
5
6
7
8
3D  
4D  
5D  
6D  
7D  
2Q  
3Q  
4Q  
5Q  
6Q  
The eight flip-flops of the BCT574 are  
edge-triggered D-type flip-flops. On the positive  
transition of the clock (CLK) input, the Q outputs  
will be set to the logic levels that were set up at the  
data (D) inputs.  
17  
16  
15  
14  
9 10 11 12 13  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or a high-  
impedance state. In the high-impedance state, the  
outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide  
the capability to drive bus lines without need for interface or pullup components.  
The output enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN54BCT574 is characterized for operation over the full military temperature range of 55°C to 125°C. The  
SN74BCT574 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each flip-flop)  
INPUTS  
OUTPUT  
Q
OE  
L
CLK  
D
H
L
H
L
L
L
H or L  
X
X
X
Q
0
H
Z
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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