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SN54BCT573J PDF预览

SN54BCT573J

更新时间： 2024-11-05 22:53:39
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德州仪器 - TI 锁存器输出元件
页数 文件大小 规格书
5页 76K
描述
OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

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SN54BCT573J 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：DIP包装说明：DIP, DIP20,.3
针数：20Reach Compliance Code：not_compliant
ECCN代码：3A001.A.2.CHTS代码：8542.39.00.01
风险等级：5.56其他特性：BROADSIDE VERSION OF 373
系列：BCT/FBTJESD-30 代码：R-GDIP-T20
长度：24.195 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER最大I（ol）：0.048 A
位数：8功能数量：1
端口数量：2端子数量：20
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：CERAMIC, GLASS-SEALED封装代码：DIP
封装等效代码：DIP20,.3封装形状：RECTANGULAR
封装形式：IN-LINE峰值回流温度（摄氏度）：NOT SPECIFIED
电源：5 V最大电源电流（ICC）：62 mA
Prop。Delay @ Nom-Sup：10.3 ns传播延迟（tpd）：8.8 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：BICMOS
温度等级：MILITARY端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：7.62 mm
Base Number Matches：1

SN54BCT573J 数据手册

 浏览型号SN54BCT573J的Datasheet PDF文件第2页浏览型号SN54BCT573J的Datasheet PDF文件第3页浏览型号SN54BCT573J的Datasheet PDF文件第4页浏览型号SN54BCT573J的Datasheet PDF文件第5页 
SN54BCT573, SN74BCT573  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SCBS071A – AUGUST 1990 – REVISED NOVEMBER 1993  
SN54BCT573 . . . J OR W PACKAGE  
SN74BCT573 . . . DW OR N PACKAGE  
(TOP VIEW)  
• State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
• ESD Protection Exceeds 2000 V Per  
MIL-STD-883C, Method 3015; Exceeds  
200 V Using Machine Model (C = 200 pF,  
R = 0)  
OE  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
• Full Parallel Access for Loading  
• Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK) and Flatpacks (W), and  
Plastic and Ceramic 300-mil DIPs (J, N)  
13 7Q  
8Q  
11 LE  
12  
description  
GND 10  
These 8-bit latches feature 3-state outputs  
designed specifically for driving highly capacitive  
or relatively low-impedance loads. They are  
particularly suitable for implementing buffer  
registers, I/O ports, bidirectional bus drivers, and  
working registers.  
SN54BCT573 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
4
5
6
7
8
The eight latches of the ′BCT573 are transparent  
D-type latches. While the latch-enable (LE) input  
ishigh, theQoutputswillfollowthedata(D)inputs.  
When the latch enable is taken low, the Q outputs  
will be latched at the logic levels that were set up  
at the D inputs.  
3D  
4D  
5D  
6D  
7D  
2Q  
3Q  
4Q  
5Q  
6Q  
17  
16  
15  
14  
9 10 11 12 13  
A buffered output-enable (OE) input can be used  
to place the eight outputs in either a normal logic  
state (high or low logic levels) or  
a
high-impedance state. In the high-impedance  
state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased  
drive provide the capability to drive bus lines without need for interface or pullup components.  
The output enable (OE) does not affect the internal operations of the latches. Old data can be retained or new  
data can be entered while the outputs are in the high-impedance state.  
The SN54BCT573 is characterized for operation over the full military temperature range of –55°C to 125°C. The  
SN74BCT573 is characterized for operation from 0°C to 70°C.  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q
0
H
X
Z
Copyright 1993, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
2–1  
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
12345

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