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SN54BCT540J PDF预览

SN54BCT540J

更新时间: 2024-11-26 22:53:39
品牌 Logo 应用领域
德州仪器 - TI 总线驱动器总线收发器逻辑集成电路输出元件信息通信管理
页数 文件大小 规格书
5页 84K
描述
OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

SN54BCT540J 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:0.300 INCH, CERAMIC, DIP-20
针数:20Reach Compliance Code:not_compliant
ECCN代码:3A001.A.2.CHTS代码:8542.39.00.01
风险等级:5.75Is Samacsys:N
其他特性:WITH DUAL OUTPUT ENABLE控制类型:ENABLE LOW
系列:BCT/FBTJESD-30 代码:R-GDIP-T20
长度:24.195 mm负载电容(CL):50 pF
逻辑集成电路类型:BUS DRIVER最大I(ol):0.048 A
位数:8功能数量:1
端口数量:2端子数量:20
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:INVERTED
封装主体材料:CERAMIC, GLASS-SEALED封装代码:DIP
封装等效代码:DIP20,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):71 mA
Prop。Delay @ Nom-Sup:7.2 ns传播延迟(tpd):7.2 ns
认证状态:Not Qualified座面最大高度:5.08 mm
子类别:Bus Driver/Transceivers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:BICMOS
温度等级:MILITARY端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

SN54BCT540J 数据手册

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SN54BCT540, SN74BCT540A  
OCTAL BUFFERS/DRIVERS  
WITH 3-STATE OUTPUTS  
SCBS012D – JULY 1988 – REVISED SEPTEMBER 1994  
SN54BCT540 . . . J OR W PACKAGE  
SN74BCT540A . . . DW OR N PACKAGE  
(TOP VIEW)  
State-of-the-Art BiCMOS Design  
Significantly Reduces I  
CCZ  
3-State Outputs Drive Bus Lines or Buffer  
Memory-Address Registers  
OE1  
A1  
V
CC  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
P-N-P Inputs Reduce DC Loading  
OE2  
Y1  
Y2  
Y3  
Y4  
Y5  
Y6  
Y7  
Y8  
A2  
A3  
A4  
A5  
Data Flow-Through Pinout (All Inputs on  
Opposite Side From Outputs)  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK) and Flatpacks (W), and  
Plastic (N) and Ceramic (J) 300-mil DIPs  
A6  
A7  
A8  
GND  
description  
The SN54BCT540 and SN74BCT540A octal  
buffers and line drivers are ideal for driving bus  
lines or buffer memory-address registers. The  
devices feature inputs and outputs on opposite  
sides of the package that facilitate printed-circuit-  
board layout.  
SN54BCT540 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
Y1  
Y2  
Y3  
Y4  
Y5  
A3  
A4  
A5  
A6  
A7  
4
5
6
7
8
The 3-state control gate is a 2-input AND gate with  
active-low inputs so that if either output-enable  
(OE1 or OE2) input is high, all corresponding  
outputs are in the high-impedance state.  
17  
16  
15  
14  
9 10 11 12 13  
The SN54BCT540 is characterized for operation  
over the full military temperature range of 55°C  
to 125°C. The SN74BCT540A is characterized for  
operation from 0°C to 70°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
OE1  
L
OE2  
L
A
L
H
L
L
L
H
X
X
H
X
Z
Z
X
H
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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