SN54AS821, SN54AS822, SN74AS821, SN74AS822
10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS230 – D2825, DECEMBER 1983 – REVISED JANUARY 1986
SN54AS821 . . . JT PACKAGE
SN74AS821 . . . DW OR NT PACKAGE
(TOP VIEW)
• Functionally Equivalent to AMD’s AM29821
and AM29822
•
•
Provides Extra Data Width Necessary for
Wider Address/Data Paths or Buses With
Parity
OC
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1
24
23
22
21
20
19
18
17
16
15
14
13
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
2
Outputs Have Undershoot Protection
Circuitry
3
4
5
•
•
Powerup High-impedance State
6
Package Options Include Plastic Small
Outline Packages, Both Plastic and
Ceramic Chip Carriers, and Standard
Plastic and Ceramic 300-mil DIPs
7
8
9
9D
10D
GND
10
11
12
•
•
Buffered Control Inputs to Reduce DC
Loading Effects
V
CC
Dependable Texas Instruments Quality and
Reliability
description
These 10-bit flip-flops feature 3-state outputs designed specifically for driving highly-capacitive or relatively
low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports,
bidirectional bus drivers with parity, and working registers.
The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock the Q outputs on
the ’AS821 will be true, and on the ’AS822 will be complementary to the data input.
A buffered output-control input can be used to place the ten outputs in either a normal logic state (high or low
levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines
significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a
bus-organized system without need for interface or pullup components. The output control (OC) does not affect
the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs
are in the high-impedance state.
The SN54AS’ family is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74AS’ family is characterized for operation from 0°C to 70°C.
SN54AS821 . . . FK PACKAGE
SN74AS821 . . . FN PACKAGE
SN54AS822 . . . JT PACKAGE
SN74AS822 . . . DW OR NT PACKAGE
SN54AS822 . . . FK PACKAGE
SN74AS822 . . . FN PACKAGE
(TOP VIEW)
(TOP VIEW)
(TOP VIEW)
OC
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1
24
23
22
21
20
19
18
17
16
15
14
13
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
9Q
10Q
CLK
2
3
4
4
3
2
1
28 27 26
3 2 1 28 27 26
5
5
25 3Q
25 3Q
3D
4D
5D
NC
6D
7D
8D
3D
4D
5D
NC
6D
7D
8D
4
6
4Q
5Q
NC
6Q
7Q
8Q
6
4Q
5Q
NC
6Q
7Q
8Q
24
23
22
21
20
19
24
23
22
21
20
19
5
7
7
6
8
8
7
9
9
8
10
10
9
11
11
9D
10D
GND
10
11
12
12 13 14 15 16 17 18
12 13 14 15 16 17 18
NC–No internal connection
Copyright 1986, Texas Instruments Incorporated
5BASIC
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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