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SN54AS821JT PDF预览

SN54AS821JT

更新时间： 2024-11-14 22:59:15
品牌 Logo 应用领域
德州仪器 - TI 触发器输出元件
页数 文件大小 规格书
6页 88K
描述
10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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SN54AS821JT 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Obsolete零件包装代码：DIP
包装说明：DIP, DIP24,.3针数：24
Reach Compliance Code：not_compliantECCN代码：3A001.A.2.C
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：5.31其他特性：POWER OFF DISABLE OUTPUTS TO PERMIT LIVE INSERTION
系列：ASJESD-30 代码：R-GDIP-T24
长度：32.005 mm负载电容（CL）：50 pF
逻辑集成电路类型：BUS DRIVER位数：10
功能数量：1端口数量：2
端子数量：24最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, GLASS-SEALED
封装代码：DIP封装等效代码：DIP24,.3
封装形状：RECTANGULAR封装形式：IN-LINE
峰值回流温度（摄氏度）：NOT SPECIFIED电源：5 V
最大电源电流（ICC）：109 mA传播延迟（tpd）：11.5 ns
认证状态：Not Qualified座面最大高度：5.08 mm
子类别：FF/Latches最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：4.5 V标称供电电压 (Vsup)：5 V
表面贴装：NO技术：TTL
温度等级：MILITARY端子形式：THROUGH-HOLE
端子节距：2.54 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：7.62 mmBase Number Matches：1

SN54AS821JT 数据手册

 浏览型号SN54AS821JT的Datasheet PDF文件第2页浏览型号SN54AS821JT的Datasheet PDF文件第3页浏览型号SN54AS821JT的Datasheet PDF文件第4页浏览型号SN54AS821JT的Datasheet PDF文件第5页浏览型号SN54AS821JT的Datasheet PDF文件第6页 
SN54AS821, SN54AS822, SN74AS821, SN74AS822  
10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS  
SDAS230 – D2825, DECEMBER 1983 – REVISED JANUARY 1986  
SN54AS821 . . . JT PACKAGE  
SN74AS821 . . . DW OR NT PACKAGE  
(TOP VIEW)  
• Functionally Equivalent to AMD’s AM29821  
and AM29822  
•
•
Provides Extra Data Width Necessary for  
Wider Address/Data Paths or Buses With  
Parity  
OC  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
9Q  
10Q  
2
Outputs Have Undershoot Protection  
Circuitry  
3
4
5
•
•
Powerup High-impedance State  
6
Package Options Include Plastic Small  
Outline Packages, Both Plastic and  
Ceramic Chip Carriers, and Standard  
Plastic and Ceramic 300-mil DIPs  
7
8
9
9D  
10D  
GND  
10  
11  
12  
•
•
Buffered Control Inputs to Reduce DC  
Loading Effects  
V
CC  
Dependable Texas Instruments Quality and  
Reliability  
description  
These 10-bit flip-flops feature 3-state outputs designed specifically for driving highly-capacitive or relatively  
low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports,  
bidirectional bus drivers with parity, and working registers.  
The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock the Q outputs on  
the ’AS821 will be true, and on the ’AS822 will be complementary to the data input.  
A buffered output-control input can be used to place the ten outputs in either a normal logic state (high or low  
levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines  
significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a  
bus-organized system without need for interface or pullup components. The output control (OC) does not affect  
the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs  
are in the high-impedance state.  
The SN54AS’ family is characterized for operation over the full military temperature range of –55°C to 125°C.  
The SN74AS’ family is characterized for operation from 0°C to 70°C.  
SN54AS821 . . . FK PACKAGE  
SN74AS821 . . . FN PACKAGE  
SN54AS822 . . . JT PACKAGE  
SN74AS822 . . . DW OR NT PACKAGE  
SN54AS822 . . . FK PACKAGE  
SN74AS822 . . . FN PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
(TOP VIEW)  
OC  
1D  
2D  
3D  
4D  
5D  
6D  
7D  
8D  
V
CC  
1
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
1Q  
2Q  
3Q  
4Q  
5Q  
6Q  
7Q  
8Q  
9Q  
10Q  
CLK  
2
3
4
4
3
2
1
28 27 26  
3 2 1 28 27 26  
5
5
25 3Q  
25 3Q  
3D  
4D  
5D  
NC  
6D  
7D  
8D  
3D  
4D  
5D  
NC  
6D  
7D  
8D  
4
6
4Q  
5Q  
NC  
6Q  
7Q  
8Q  
6
4Q  
5Q  
NC  
6Q  
7Q  
8Q  
24  
23  
22  
21  
20  
19  
24  
23  
22  
21  
20  
19  
5
7
7
6
8
8
7
9
9
8
10  
10  
9
11  
11  
9D  
10D  
GND  
10  
11  
12  
12 13 14 15 16 17 18  
12 13 14 15 16 17 18  
NC–No internal connection  
Copyright 1986, Texas Instruments Incorporated  
5BASIC  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
123456

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SN54AS821JT 替代型号

型号 品牌 替代类型 描述 数据表
SN74AS823ANT TI

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SN74AS821ANT TI

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SN74AS821ADW TI

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 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

与SN54AS821JT相关器件

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SN54AS821JT-00 TI

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 		AS SERIES, 10-BIT DRIVER, TRUE OUTPUT, CDIP24
SN54AS822 TI

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 		10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AS822FH TI

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 		IC,FLIP-FLOP,10-BIT,D TYPE,AS-TTL,LLCC,28PIN,CERAMIC
SN54AS822FH-00 TI

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 		AS SERIES, 10-BIT DRIVER, INVERTED OUTPUT, CQCC28
SN54AS822FK TI

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 		10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AS822JT TI

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 		10-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AS822JT-00 TI

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 		AS SERIES, 10-BIT DRIVER, INVERTED OUTPUT, CDIP24
SN54AS823A TI

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 		9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AS823A_15 TI

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 		9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
SN54AS823AFK TI

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 		9-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

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