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SN54AS27 PDF预览

SN54AS27

更新时间: 2024-11-26 22:59:15
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德州仪器 - TI 输入元件
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描述
TRIPLE 3-INPUT POSITIVE-NOR GATES

SN54AS27 数据手册

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SN54ALS27A, SN54AS27, SN74ALS27A, SN74AS27  
TRIPLE 3-INPUT POSITIVE-NOR GATES  
SDAS112B – APRIL 1982 – REVISED DECEMBER 1994  
SN54ALS27A, SN54AS27 . . . J PACKAGE  
SN74ALS27A, SN74AS27 . . . D OR N PACKAGE  
(TOP VIEW)  
Package Options Include Plastic  
Small-Outline (D) Packages, Ceramic Chip  
Carriers (FK), and Standard Plastic (N) and  
Ceramic (J) 300-mil DIPs  
1A  
1B  
V
CC  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
1C  
1Y  
3C  
3B  
3A  
3Y  
description  
2A  
2B  
These devices contain three independent 3-input  
positive-NOR gates. They perform the Boolean  
functions Y = A B C or Y = A + B + C in positive  
logic.  
2C  
2Y  
GND  
8
The SN54ALS27A and SN54AS27 are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS27A and SN74AS27 are characterized  
for operation from 0°C to 70°C.  
SN54ALS27A, SN54AS27 . . . FK PACKAGE  
(TOP VIEW)  
3
2
1
20 19  
18  
FUNCTION TABLE  
(each gate)  
2A  
NC  
2B  
4
5
6
7
8
1Y  
NC  
3C  
NC  
3B  
17  
16  
15  
14  
INPUTS  
OUTPUT  
Y
A
H
X
X
L
B
X
H
X
L
C
X
X
H
L
NC  
2C  
L
L
9 10 11 12 13  
L
H
NC – No internal connection  
logic symbol  
logic diagram (positive logic)  
1
1A  
1
1  
1A  
2
12  
6
2
12  
6
1B  
1Y  
2Y  
3Y  
1B  
1Y  
2Y  
3Y  
13  
13  
1C  
1C  
3
3
2A  
4
2A  
4
2B  
5
2B  
2C  
5
2C  
9
3A  
9
3A  
10  
8
3B  
10  
8
11  
3B  
3C  
11  
3C  
This symbol is in accordance with ANSI/IEEE Std 91-1984  
and IEC Publication 617-12.  
Pin numbers shown are for the D, J, and N packages.  
Copyright 1994, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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